ASSET Intertech Bundles Intel Processor Tools

“This gives a cross-platform design organisation the opportunity to optimize its investment in validation and test tools,” said Tim Caffee, vice president of design validation for ASSET. “A development team working on a Core-based design, for example, can share tools with another team that might be developing servers based on Xeon processors. At the end of the day, it’s all about delivering greater value to our customers. With each generation of electrical validation tools for IA-based designs, we continue to improve our products and bring more value to users.”

With the recent announcement of Intel Silicon View Technology (Intel SVT), ASSET’s ScanWorks platform for embedded instruments became the only toolset in the industry that fully supports all three aspects of this new validation, debug and test capability, which Intel is embedding in its processors and chipsets. Specifically, ScanWorks HSIO tools work with the Intel SVT electrical validation capabilities to measure and optimize operational timing and voltage margins on high-speed data links and buses such as PCI Express, Direct Media Interface (DMI) and the DDR3/4 memory buses, all of which terminate in the processor or chipset.

ScanWorks functions interactively with Intel SVT to investigate the root causes of low operating margins on these buses. In a board manufacturing test setting, ScanWorks Boundary-Scan Test (BST) and Processor-Controlled Test (PCT) function with Intel SVT to test and diagnose both structural and at-speed defects.

Intel SVT and ScanWorks offer improved diagnostics by enabling at-speed tests for high-speed interfaces, thereby reducing dependencies on board functional test and providing test cost reduction opportunities. And with ASSET’s recent acquisition of Arium along with its software/firmware hardware-assisted debug tools, the ScanWorks platform has been greatly enhanced in the third aspect of Intel SVT, platform debug.