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R-Car H1 Series of Systems-on-Chip Offers Complete Scalable Lineup for the Car Infotainment Market

18th October 2011

Renesas

ES Admin

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Renesas Electronics and its subsidiary, Renesas Mobile Corporation, today announced a new member of the R-Car series of automotive systems-on-chip (SoCs), the R-Car H1, capable of delivering up to 11,650 Dhrystone MIPS (DMIPS) and ideal for the high-end car navigation market. The R-Car H1 SoC offers an innovative architecture where the application domain is powered by an ARM CortexA-9 quad-core configuration running at 1 gigahertz (GHz). The real-time domain is powered by a dedicated multimedia engine (MME) based on Renesas’ SH4A core. The R-Car’s architecture allows customers to implement features such as quick-boot, backup camera support and media processing using the MME, while the application domain cores can be allocated to run advanced operating systems such as Linux, Windows Automotive Embedded or QNX.

Renesas’ R-Car H1 SoC offers one of the most complete system integrations available on the market today. Powered with Imagination Technologies’ SGX-543-MP2 graphics processing unit (GPU), and delivering up to 40 gigaflops per second (Gflops/s, effective), the R-Car H1 SoC offers one of the best graphical performance levels in the embedded market. The GPU is ready to support open technologies OpenGL ES 2.0 and OpenVG 1.1, making it a perfect platform to develop next-generation car infotainment systems.

As an optional feature, the R-Car H1 SoC can also be powered by Renesas’ IMP-X3 core, a real-time image processing unit that enables developers to respond to the emerging trend of augmented reality. To fully benefit from the IMP-X3 core, the R-Car H1 SoC also supports up to four independent input camera channels, allowing easy implementation of 360-degree camera views and sign recognition as well as other applications.

Video and audio processing is supported by hardware accelerators supporting up to HD 1080p at 60fps on advanced infotainment systems. To insure adequate memory bandwidth, the R-Car H1 SoC is equipped with two independent DDR3 32-bit interfaces which allow access to different content simultaneously, providing higher performance compared with solutions that offer a single 64-bit DDR interface.

The R-Car H1’s integrated peripherals include Ethernet, MOST-150, PATA and SATA interfaces and PCIe for system expansion. The R-Car H1 SoC also offers a version with a GPS baseband engine enabling further system integration. The R-Car Series offers multiple CAN channels and two independent display controllers as well as three USB 2.0 ports with PHY.

Availability

Samples of Renesas’ R-Car H1 SoCs will be available starting in November 2011, equipped with an 832-pin FCBGA (flip chip ball grid array) package. Mass production is scheduled to begin in December 2012 and is expected to reach a cumulative 100,000 units per month in December 2013. (Availability is subject to change without notice.)