Test & Measurement
Agilent Unveils 28.4Gb/s Multiplexer With Optional De-Emphasis
Agilent Technologies introduced a 28.4-Gb/s multiplexer featuring optional de-emphasis with up to eight taps for R&D and test engineers who need to characterise receivers for next-generation servers, storage systems and data-centre networks. The multiplexer expands the pattern generator bit rate of the J-BERT N4903B high-performance bit error ratio tester.
To mDesign and test engineers who need to characterise 25-Gb/s receiver ports face one big challenge: margins are getting extremely tight. To achieve repeatable test results and sufficient design margins, test equipment must be ultraprecise.
The M8061A 28-Gb/s multiplexer with optional de-emphasis enables accurate receiver characterisation for server and other data-centre interfaces.
The multiplexer has a built-in eight-tap de-emphasis, which allows engineers to emulate transmitter de-emphasis and channels and compensate losses in the test setup. It is transparent to jitter from J-BERT and provides additional clock/2 jitter injection capabilities. The built-in superposition of level interference eliminates the need for external power splitters that can cause level and signal degradations.
Engineers can now characterise next-generation computing buses operating above 14Gb/s and data-centre I/Os. When engineers use the multiplexer with J-BERT N4903B, they can generate loopback training sequences. The DC-coupled output allows engineers to generate unbalanced bit patterns without level drift, and it can be switched to an electrical idle state for computer bus receiver tests such as those required for PCI Express.
The 28-Gb/s multiplexer with de-emphasis option can be added to an existing J-BERT test setup with minimal investment. The equipment can be used to test multiple-gigabit test applications, such as PCIe, USB, SATA, QPI, Hypertransport, Thunderbolt, DisplayPort, SD UHS-II, MIPI M-PHY, backplanes, 10-Gb Ethernet and 100-Gb Ethernet, SFP+ and CFP2 interfaces.