Teledyne LeCroy Upgrades DDR Protocol Analyzer to Support ECC SO-DIMM

The DDR3 interposers in combination with Teledyne LeCroy's Kibra 480 protocol analyzer provide a convenient way to test ECC SO-DIMMs that are increasingly found in micro-servers and real-time embedded applications.



Designed for use with the LeCroy Kibra 480 protocol analyzer, the new interposers sit in-line between the DDR3 ECC SO-DIMM modules and SO-DIMM memory sockets. Rigid Flex connectors make it easy to attach the interposers to the SO-DIMM target memory slot. Developers can probe one or two slot configurations and gain immediate visibility to DDR3 memory operations. Teledyne LeCroy now offers the widest support for testing DDR3 SO-DIMMs with probes available for SO-RDIMM with ECC, SO-UDIMM with ECC, and standard SO-DIMM without ECC.



Since systems using ECC SO-DIMMs have the capability to detect and/or correct memory errors, they are gaining traction in micro-server systems as well as real time embedded applications, said Michael Romm, Vice-President of Product Development, Teledyne LeCroy's Protocol Solutions Group. With probing support for UDIMM, RDIMM, SO-DIMM, and now SO-DIMM with ECC, the Kibra 480 can be leveraged across different design projects or different design teams.



The industry's first standalone protocol analyzer for both DDR3 and DDR4, the Kibra 480 system was introduced in February 2012 and provides traditional waveform views as well as decoded state listings that show DDR command timing. Specialized trigger logic is capable of identifying over 65 JEDEC violations across all ranks and banks simultaneously. Using non-intrusive slot interposer probes, the system provides a flexible platform for testing and analyzing memory DDR3 and DDR4 memory subsystems.