JTAG/Boundary Scan hardware interface stars at Autotestcon
JTAG Technologies will be showcasing the new JTAG/boundary-scan hardware interface product compatible with the Virginia Panel (VPC) mass interconnect system at Autotestcon 2014 in St. Louis (Sept 15-18) The JT 2147/VPC is a signal conditional module that allows ‘ideal world’ connections from JTAG Technologies PXI and PXIe DataBlasters to the VPC connection system.
Based on the QuadPod architecture from JTAG Technologies, the platform has been specifically designed for connection into G20x or G14x 192 pin ‘QuadraPaddle’ connectors and is compatible with the VPC ‘pull thru’ system. By integrating the system, test system builders will greatly simplify their wiring task and, at the same time, retain the excellent signal integrity assured by the QuadPod’s active interface.
The JT2147/VPC features four independent JTAG Test Access Ports (TAPs) along with 16 static DIO channels and 64 dynamic DIOS channels. Each TAP can be programmed to operate through a range of voltage levels to suit various logic families.
Also featured is AutoBuzz a tool that uses a ‘seek and discover’ feature to scan completely a compliant design and then perform comparative tests using JTAG/boundary-scan.
With only JTAG scan-chain information plus BSDL models of the JTAG/IEEE std 1149.1 compliant parts (available from manufacturers’ web-sites), users of the tool will be able to connect to their designs via a number of compatible JTAG interface options. AutoBuzz can then be set to gather a complete ‘connectivity map’ of any board’s boundary-scan to boundary-scan pin connections (where these can be direct or via ‘transparent’ devices such as series resistors).
AutoBuzz supports just two simple operating modes: Learn and Compare. With AutoBuzz in Learn mode a ‘known good’ sample PCB is initially scanned to establish a reference connectivity map. Suspected faulty boards can then be scanned by AutoBuzz in Compare mode, and a comparison is automatically made of their connectivity maps. Differences between the two maps are highlighted to indicate possible faults such as interconnect short-circuits, open-circuits or ‘stuck-at’ faults.