Test & Measurement

Enabling verification tools for InFO Tech variants

13th January 2017
Enaie Azambuja
0

Mentor Graphics announced that TSMC has extended its collaboration with Mentor Graphics on the Xpedition Enterprise platform in conjunction with the Calibre platform for the design and verification of TSMC’s InFO (Integrated Fan-Out) packaging technology for multi-chip and chip-DRAM integration applications. Mentor developed new Xpedition functionality specifically to support InFO and enable the IC package designer to complete design tasks to TSMC specification.

By leveraging the capabilities of both the Calibre and HyperLynx technologies, the new Xpedition functionality minimises the designer effort and design rule checking (DRC) cycles required to achieve a DRC-clean InFO GDS file.

“TSMC’s InFO packaging supports diverse industry needs,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “An InFO solution based upon package tools such as the Xpedition Enterprise and sign-off Calibre platforms from Mentor Graphics helps our customers meet their time-to-market goals.”

The Mentor Graphics Xpedition Enterprise platform is a broadly used design flow for PCB, IC package, and multi-board system-level design, from architecture authoring through implementation to manufacturing execution.

The integration of the Xpedition Enterprise platform for design with the HyperLynx tool suite and industry-leading Calibre platform for analysis and verification provides a wide range of advantages to designers implementing InFO designs:

• Xpedition generates InFO layouts meeting TSMC design rule requirements;
• Streamlined in-design InFO-specific manufacturing verification using HyperLynx DRC expedites time to closure, reducing DRC iterations during the design stage;
• Calibre DRC, LVS, and 3DSTACK solutions provide sign-off-level die and InFO package DRC and layout vs. schematic (LVS) inter-die connectivity verification to ensure TSMC-required accuracy and a DRC-clean GDS to improve first-time success rates;
• Direct highlighting and cross-probing of Calibre tools into packaging design cockpit results reduces time to foundry-ready signoff;
• Integration to thermal analysis and thermally-aware post-layout simulation flows provides early identification of potential heat issues;
• System-level signal path tracing, extraction, simulation, and netlist export ensures complete InFO package signal integrity.

“This collaboration builds on and expands Mentor’s initial support for TSMC’s InFO packaging technology,” said A.J. Incorvaia, vice-president and general manager of the Mentor Graphics Board Systems Division.

“The ongoing collaboration between TSMC and Mentor Graphics ensures that new variants of InFO technologies can be readily assimilated into design portfolios, enabling design companies to expand their product offerings with confidence in their design performance and market schedules.”

“Companies implementing TSMC’s InFO designs are looking for an integrated solution that supports the unique implementation and verification needs of InFO package designs at a foundry sign-off level,” said Joe Sawicki, vice president and general manager of the Mentor Graphics Design to Silicon Division.

“The combination of the Xpedition Enterprise platform with Calibre toolsets provides our mutual customers with a unified design and verification environment that produces foundry sign-off-clean InFO designs.”

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