Teledyne LeCroy Announces DDR4 Physical Layer Compliance Test Support and DDR4 Lighthouse Partners Program

The DDR4 Lighthouse Partners Program is open to existing Teledyne LeCroy customers as well as those who do not own Teledyne LeCroy equipment.



DDR4's higher transfer speeds and lower operating voltage have driven new test methodologies and test requirements which were not previously required for DDR3. The first publication of the DDR4 specification (JESD79-4) was released in December of 2012 with some of the measurement methodology left undefined. However, through Teledyne LeCroy's involvement in the Joint Electron Device Engineering Council JEDEC, the anticipated measurement methodology is incorporated into the automated DDR4 compliance test package.



Superior Serial Data Analysis Algorithms Applied to DDR4 Testing



Given the more complex signal integrity challenges involved with DDR4, JEDEC has introduced a variety of new physical layer requirements in JESD79-4 to help to ensure proper signal fidelity at DDR4 transfer rates. JESD79-4 is the first DDR specification that applies traditional serial data jitter measurement methodologies, such as bit error rates and jitter decomposition, as well as requiring traditional clock jitter measurements. Additionally, the technique of directly measuring setup and hold times has been replaced with a Data Input Valid Window eye mask, which accounts for both random and deterministic jitter and noise. Teledyne LeCroy's superior serial data analysis algorithms address these new tests in the automated DDR4 compliance test software. DDR4 developers who are part of the DDR4 Lighthouse Partners program can have access to software which includes these new tests.



Virtual Probe Enables Superior DDR4 Signal Integrity



DDR4 signal speeds present unique probing challenges. In order to obtain the best signal quality and minimize reflections, the ideal probing location is directly at the ball grid array; however, in reality this is not practical. Teledyne LeCroy provides a variety of software tools which can be used to improve the DDR probing experience to maximize signal integrity. The Virtual Probe package allows developers to virtually move the probing location to the DRAM BGA, where the probe cannot be physical placed. Additionally, the Virtual Probe can be used to remove any effects of the probe or interposes through de-embedding. Furthermore, the VP@Rcvr (Virtual Probe at Receiver) math function can be used to model the circuit of the DIMM to reduce reflections in the signals under test.



Greatest Confidence and Debugging Capabilities of Any DDR4 Solution



Teledyne LeCroy's DDR4 compliance test package automatically measures a large number of cycles in a short time, performing several thousand measurements in the same time competitors perform less than one hundred. This capability is critical to deliver statistically meaningful results and ensure confidence that the true maximum and minimum points have been caught without requiring multiple acquisitions. Additionally, Teledyne LeCroy's DDR4 compliance test package easily enables system debug which is crucial for DDR4 development efforts. By using the Stop on Test feature the user can pause testing after each individual test and leverage the variety of debugging tools Teledyne LeCroy has to offer. Upon completion testing can be seamlessly resumed with one click of a button.



About the Lighthouse Partners Program,/b>



The Lighthouse Partners Program gives developers an opportunity to have early access to design validation software and work very closely with the Teledyne LeCroy product development team. The ideal candidate will have a DDR4 DIMM, controller, or system that requires validation. In return feedback would be provided to Teledyne LeCroy. The DDR4 Lighthouse Partners program activity will begin in early May for a limited number of participants. All interested participants are encouraged to contact Bob Mart at robert.mart@teledynelecroy.com.