Test & Measurement
SELEX and GOEPEL co-operate to enable Boundary Scan and dynamic Functional Test in critical system environments
At the Defence Systems and Equipment International (DSEI) GOEPEL electronic, worldwide leading vendor of JTAG/Boundary Scan solutions compliant with IEEE1149.x, announced the launch of PXI 5396/FXT-x, a further series of JTAG/Boundary Scan digital I/O modules on the basis of the PXI bus.
The PXI5396-FXT was developed in cooperation with SELEX Galileo and supports both the structural JTAG/Boundary Scan Test and dynamic I/O operations up to 100MHz for the execution of functional tests in critical environments.
“T“Boundary Scan and the execution of simulation-supported functional tests are important elements of the future test strategy for our applications,” says Tom Phillips, Test Manager at SELEX Galileo in Luton. “Due to the excellent cooperation with GOEPEL electronic we are now able to apply an optimised solution in regard to flexibility, performance, and in-fixture signal quality for our revised PXI/PXI Express tester platform.”
The PXI 5396/FXT-x is a two-component solution and consists of a PXI supported Interface Module (IFM) and an offset Core Module (CM). The distance of the modules can be up to 2m without loss of performance. The Core Module is equipped with a front connector by Virginia Panel Corporation, which allows the module to be inserted directly in the interface of the Interchangeable Test Adaptor (ITA). Due to this, an optimum reliability of the I/O signals is achieved even with fixtures offset from the PXI chassis.
Two variants are available, which differ in the depth of the on-board memory (72MB with the PXI 5396/FXT and 144MB with the PXI 5396/FXT-XM). Both variants provide 96 single ended channels, configurable as input, output and tri-state, which allow simultaneous driving and measuring, as well as real-time comparison.
While the signals are processed synchronously to the test bus operations in the JTAG mode, the dynamic I/O mode allows functional testing with freely programmable clock rates within the range of 500Hz to 100MHz. Normally, structural Boundary Scan tests are carried out first with functional tests following.
For the flexible adaptation to the Unit Under Test (UUT) the I/O are programmable from 1.8V to 5V, and allow individual pull/up and pull/down adjustments for each channel. Additional features are included for the safety of the interface, improved current efficiency, and the impedance adjustment. Up to 5 PXI 5396/FXT-x modules are cascadable in an I/O brick, with all PXI trigger signals being supported for synchronizations. The implemented VarioCORE® technique adds extra flexibility to the module by enabling the use of custom IP embedded in the hardware of the module.
Software wise the PXI 5396/FXT-x are supported by the integrated JTAG/Boundary Scan development environment SYSTEM CASCON™ starting from version 4.5, which relieves the user from the time-consuming manual editing of the project data. This includes the automatic generation of wiring diagrams, as well as the Automatic Test Program Generation (ATPG) for Boundary Scan. After the test is finished a failure diagnosis is carried out on the pin and net level, with the fault location being visualised in the layout.
The execution of functional dynamic tests and the subsequent failure diagnosis are based on the support of the standard IEEE 1445 Digital Test Interchange Format (DTIF), which is now integrated in SYTEM CASCON™. Additional to the import processors, an interactive waveform editor is available, too.