12.8Gbps instrument tests leading-edge SerDes ports

The latest application processor and related ICs require greater than 6.4Gbps and have increased lane counts.

Furthermore, many ports are mixed-mode, requiring both embedded clock and forwarded clock operation.

With 32 transmit and 24 receive lanes per instrument running at up to 12.8Gbps data rate, HSI1_x provides the highest channel density and cost-effectiveness in the ATE industry allowing for high multi-site full-functional testing resulting in the lowest cost of test.

HSI1_x builds on the established Diamond_x HSIO instrument and enhances the capabilities to meet the advanced test requirements.

The HSI1_x has 3.5 times the lane count and twice the data rate of the HSIO instrument, and adds programmable lane-lane timing alignment.

It features true parallel clock-data recovery and bit-error-rate testing, built-in PRBS pattern generation, deep user-programmable pattern memory, and flexible jitter and equalisation settings.

Christopher Lemoine, Product Marketing Director, comments: “Xcerra has long legacy of leading-edge SerDes solutions. Working closely with our customers, we have developed this new instrument to support the test needs of next generation applications processors, flat panel display drivers, display timing controllers, and other high data rate devices, with cost effectiveness that is unmatched in the ATE industry. Combined with the ground-breaking efficiency and scalability of the Diamond_x platform, the HSI1_x is a compelling solution for the latest mobility, consumer and automotive devices.”