Implementing Gigabit Power over Ethernet to achieve EMC compliance – Part 2

To investigate the EMC properties of the Gigabit Power over Ethernet interface, Würth Elektronik started by developing and implementing its own reference design RD022 [3].

The first part of the article [5] explained the EMC basics for PoE, the EMC test setup with the operating parameters and output filters for long cables. The second part now goes on to deal with the aspects of conducted interference emission, immunity testing, measurement time, emission testing, and exposure time.

Conducted interference emission

In conducted interference emission testing (Fig. 5) the performance of the board is borderline with shielded Ethernet cable, and the limit value is even exceeded if unshielded cables are used requiring further measures.

Fig. 5. Conducted interference emission at 12 V and 2 A output current with long filtered load lines

The reason for this behaviour results from the design of the isolated converter. The isolated DC/DC converter from the PoE board is connected to the digital section of the circuit without an output filter. The USB shield is connected to digital GND. The shielding box, which is connected to the USB cable shield, takes up the most space in the setup. A common-mode loop results from the stray capacitance of the shielding box to the metal wall of the cabin, the cause of which is the transformer from the isolated converter. The stray capacitance from the isolated converter is the source of the coupling path for the interference, where the interference current flows from the switching transistor to the secondary-side switching section of the converter (digital section) and then couples to the reference ground (shield space) via the USB cable shield and the shield box. The return current path to the source is via the Ethernet cable and its termination using the AAN (Asymmetric Artificial Network – 150 Ohm common-mode impedance). The voltage drop across the CDN (coupling/decoupling network) is then measured as the interference voltage. This interference current path is shown in Fig. 6 and calculated for an area of 1m² as an example.

Fig. 6. Interference current loop, which leads to the conducted interference emission (CM = common mode)

The current loop in Fig. 6 increases if the secondary side of the isolated converter is connected to reference ground – via the earthing of the USB shield, for example. The interference current rises, which also increases the voltage drop in the AAN. Grounding the secondary side may cause the highest interference potential.

The situation outlined leads to the power supply on the PoE board being extended with a filter to guarantee compliance with the conducted interference emission limits. These measures result in the board setup as in Fig. 7:

Fig. 7. Extension of the board with copper sheet as the shielding plate and filter components

The capacitor for short-circuiting the primary and secondary GND layers should in principle be significantly larger (typ. 100x) than the stray capacitance of a transformer. Given an isolation voltage of 2kV, this becomes difficult with larger stray capacitances, so care should generally be taken with isolated power supplies and converters to ensure low stray capacitance of the transformer between the primary and secondary sides.

Testing the interference immunity

The criteria for the Gigabit Ethernet interface can be adopted from [2] for this board and only needs to be extended to include stability of the power supply.

Fig. 8. Monitoring of transmission speed and fluctuations due to the PoE switch

Measuring time, emission test, and exposure time

The data transfer defined in the LabView software from a data string for speed and error rate measurement leads to a viewing time of 2s: 1s error rate, 1s speed. To reliably measure both states in terms of emission as well as interference immunity, an emission measurement time and an exposure time of 3s are selected for the continuous interference, as with the Gigabit Ethernet design [1] previously.

EMC behaviour of the reference design

The extensive EMC related tests are beyond the scope of this article and are described in detail in AppNote ANP122 from Würth Elektronik [4]. It describes the EMC behaviour of reference design RD022 “GB PoE+ Ethernet USB adapter” and examines the following aspects in detail:

• Conducted interference emission
• Radiated interference emission
• Radiated interference immunity
• Immunity to burst
• Immunity to surge
• Immunity to continuous conducted interference
• Further improvements in EMC behaviour

[1] Zenkner, H.: Reference Design Gigabit-Ethernet Front End, RD016, Würth Elektronik: www.we-online.com/RD016    

[2] Stirn, A.: EMC Aspects ofGigabit-Ethernet Interfaces , AppNote ANP116, Würth Elektronik: www.we-online.com/ANP116  

[3] Zenkner, H.: GB-PoE+-Ethernet-USB“-Adapter for industrial use  with an EMC perspective, Reference Design RD022, Würth Elektronik: www.we-online.com/RD022

[4] Stirn, A.: Gigabit PoE Interface from an EMC perspective, AppNote ANP122, Würth Elektronik: www.we-online.de/ANP122  

[5] Stirn, A.: Implementing Gigabit Power over Ethernet to achieve EMC compliance – Part 1. EETimes xx/2024, p. yy