Driving The Power Electronics Revolution

Since the advent of the spontaneous AlGaN-GaN based high electron mobility sheet formation, first discovered by M Asif Khan in 1991, significant effort has been made to bring the inherent capabilities of this exciting material system to bear in practical semiconductor power devices. The combination of high breakdown field strength due to the wide band gap of the III-nitrides, high electron mobility, as well as an unusually high channel electron density yield a remarkably compelling drift resistance.
Such devices also benefit from the reduced gate charge requirements involved in switching the devices on and off. Probably the most exciting attribute of the system involves the easily isolating nature of the inherently lateral devices, permitting unprecedented monolithic integration of power systems. From a technologist’s point of view, it is unfortunate that, as in many such inherently superior technological alternatives, economics more than physics will determine the rate and extent of adoption of GaN based power devices.

The driving metric for adopting new semiconductor technologies is performance/cost. This is the same as used in the popular Moore’s Law for data processing technology. It is therefore imperative that focus be placed not on performance alone but at least equally on the fundamental factors that drive the economics of the technological proposition. In order to beat silicon, it is best to stay as close to the incumbent silicon platform as possible, only deviating when required.
In the case of GaN based power devices, one of the single greatest factors affecting cost is the choice of substrate material. As the adoption of any new device structure must compete with that of the incumbent, the cost of substrate and epitaxial growth should not far exceed the cost for a comparable fully fabricated silicon device.

This sets an upper limit of about $3/cm2 for the combined cost of substrate and epitaxial layer. Only silicon substrates meet this requirement. The use of silicon substrates for GaN hetero-epitaxy present several significant technical challenges due to large mismatches in thermal coefficient of expansion as well as lattice constants of the materials. As a technologist, such a challenge must be met and not avoided.

In addition, device fabrication processing costs must be competitive with CMOS based silicon processing often performed in large scale foundries processing >20,000 wafers/week. Therefore, in order to achieve the required performance/cost, GaN based devices should be processed in the same high volume foundries, using as much of the same high throughput, high yielding process technologies as used for silicon based devices as possible. Today, this requires that the substrates be at least 150 mm, preferably 200 mm.

Device performance requirements are not limited to such figures of merit as on-resistance or gate charge. Leakage currents, for instance, should achieve the performance levels of incumbent silicon devices. This is to say that the criteria for both breakdown voltage and leakage currents (gate and source-drain) must be adjusted down from that commonly used when discussing GaN based devices of mA/mm of gate periphery to a more practical 0.1~1µA/mm. In addition, device quality, stability and reliability are all to be considered first order requirements for successful commercialization of any new technology, with the incumbent silicon platform setting the standard.

A technological platform that meets the performance and cost requirements described above has been developed by International Rectifier, referred to as GaNpowIR. This platform uses multi-wafer MOCVD reactors to grow GaN epitaxy on standard 675µm thickness 150mm silicon substrates. Wafer bow for 2µm of epitaxial films is routinely less than 20µm. The device processing is fully compatible with silicon CMOS foundries and is based on thin film photo and etch lithography. The ohmic contacts are formed without the use of gold metallurgy.

Epitaxial quality is excellent, rivalling the published performance of any such film. Fabricated low voltage devices routinely exhibit Ion/Ioff ratios of >1012 with leakage currents less than 0.1pA/mm. In fact high voltage devices have been routinely shown to exhibit Ion/Ioff ratios in excess of 107, where Ioff is measured at 600V at less than 0.1µA/mm. In addition, the use of an insulated gate provides gate leakage currents of less than 0.1 pA/mm as shown in Figure 1.

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Fig1
Figure 1: Id (A/mm) vs Vds (Volts) for early HV GaNpowIR HFET, Vgate= -10 V.

In addition, excellent device ruggedness in the form of forward biased safe operating area, shown in Figure 2, and longterm stability of parametric performance such as Rdson as well as drain and gate leakage currents have been demonstrated to over 6000hr. In fact, to date, over 3million device hours under accelerated stress conditions have demonstrated stable parametric behaviour for initial GaN based devices. See Figures 3 & 4.



Fig2
Figure 2: Forward biased SOA for low voltage GaN based power devices intended for 12Vin power conversion applications.


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Fig3
Figure 3: Stability of gate leakage current over 3000hr with –50V applied to the 8.5V rated gates at 150°C.


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Figure 4: 30V GaNpowIR HEMT device stability over 3000hr under reverse bias stress with Vdrain-source of 26V, Vg=- 7 V and at 175 C. Ids measured at room temperature for Vds=14.5 V and Vg = –7V. Wg= 2550mm, Lg=0.3μm.