Achieve up to 10 times faster power signoff

Ken Hansen, vice president and chief technology officer at Freescale Semiconductor, commented: “We are teaming early on with Cadence to validate the Voltus technology and we are impressed by its performance gains. This type of enhanced productivity is invaluable to help us meet our time-to-market goals.”

The second major new product this year, Cadence's Voltus IC Power Integrity Solution is aimed at speeding design signoff and closure. Users can shrink the critical power signoff closure and analysis phase to a minimum through key capabilities including a new massively distributed parallel power integrity analysis engine that delivers a scalable performance gain up to 10X over competing products, and a hierarchical architecture that, coupled with the parallel execution, scales to multiple CPU cores and servers, enabling the analysis of designs of up to a billion instances. Other key capabilities are SPICE-accurate solver technology that provides the most accurate power signoff results and physically-aware power integrity optimization, such as early rail analysis, de-coupling cap and power gating switches, that improves physical implementation quality and speeds up design closure.

Delivering these capabilities as a standalone product, the Voltus IC Power Integrity Solution can offer even greater benefits when combined with other Cadence tools. When used with Tempus Timing Signoff Solution, it provides the industry’s first unified electrical signoff solution for faster, converged timing and power signoff; while it offers a unique and comprehensive power integrity solution encompassing chip, package and PCB when combined with Encounter Digital Implementation System and Allegro Sigrity Power Integrity. When integrated with Virtuoso Power System, it can analyse custom/analog IP in an analog mixed-signal SoC design; and finally it offers accurate IC chip power integrity analysis, driven by real-world power stimulus when used  with Palladium Dynamic Power Analysis functionality.

“With power issues playing an ever-growing role in SoCs, we realized that existing technology would not meet the needs for complex designs. Voltus IC Power Integrity Solution is Cadence’s answer to these challenges, and all our early adopters are reporting great successes on its performance and capacity, including on-time tapeout for one of the industry’s largest chips,” comments Anirudh Devgan, Senior Vice President of the Digital and Signoff Group at Cadence.

The Voltus IC Power Integrity Solution is available now.