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500-mA LDOs Double the Power Rejection of Competing Devices to Improve Portable and Battery-powered Equipment Performance

25th January 2011

Analog Devices

ES Admin

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Analog Devices introduced two low-quiescent-current LDOs (low-dropout linear regulators) that deliver outstanding supply-rejection performance to help battery-operated portable equipment run longer and more efficiently. The new ADP124 and ADP125 LDOs have excellent PSRR (power-supply-rejection ratio) performance of 60 dB at 100 kHz, which is twice that of the nearest competing LDOs, and achieve low noise of 35 µVrms (micro-volts per root mean squared) at 1.8 V output. Operating from an input voltage between 2.3 V and 5.5 V and providing up to 500 mA of output current down to a 0.8 V output, the new LDOs also feature a low quiescent current of 210 μA and a 130 mV dropout voltage at a 500 mA load, which further improves portable equipment operating efficiency over a wide input-voltage range.

“Designing for portable products requires a small solution size, low power dissipation, and high power-supply rejection for the best mixed-signal processing performance, particularly during instances where the power supply is a hidden source of noise,” said Walt Heinzer, product line manager, Power Management Group, Analog Devices. “By offering a superior 60-dB PSRR, these high-performance LDOs are 30 dB--or 30X better on a logarithmic scale--when compared to commodity LDOs that offer 25 dB or 30 dB. They surpass competitive alternatives by offering the best combination of very-low dropout, low noise, and high power-supply-rejection ratio at a very competitive price.”

The ADP124 offers 31 fixed-output voltage options from 1.75 V to 3.3 V. The ADP125 LDO provides an adjustable output voltage between 0.8 V and 5.0 V using an external voltage divider. The ADP124 and ADP125 are specifically designed for stable operation with tiny 1 μF ceramic input and output capacitors to meet the requirements of high-performance, space-constrained applications. The LDOs are available in a compact 2 mm x 2 mm x 0.55 mm LFCSP package or an 8-lead exposed paddle MSOP package.

Key Features and Benefits

* 60-dB PSSR at 100 kHz keeps higher frequencies from mixing into RF (radio frequency) loads resulting in improved phase-noise performance.
* An initial 1 percent accuracy provides tight tolerances for core voltage rails in FPGA applications.
* Very-low-dropout voltage of 130 mV at 500 mA minimises power loss and allows operation further down the battery discharge curve.
* Low noise of 35 µVRMS at 1.8Vout provides clean power supply to high-performance A/D converters without the addition of extra output bypass capacitors.
* Stability with 1 µF Cout ceramic capacitors maintains compact footprint for space sensitive applications.