ADC & DAC cores enable concurrent multi-band/beam operation

The ultra-high speed data converters enable agile operation and concurrent multi-band / multi-beam operation as well as extremely high dynamic performance ideally suited for highly oversampled systems utilizing large instantaneous bandwidth at low power and small areas.  The 32nm data converter cores are the first offering in Semtech’s roadmap of data converter cores. The Semtech roadmap includes a family of data converter cores in 14nm FinFET expected to be available end of 2015.

“Through leveraging the IBM 32nm SOI process with its unique feature set, we are developing Advanced Cores that we believe are well-suited for meeting the challenges presented by the next step in high performance communications systems such as 400 Gb/s Optical systems and Advanced Radar systems,” said Craig Hornbuckle, Semtech’s Chief Systems Architect. “We are also seeing an expanding range of applications in the existing radio frequency communications marketplace where high-speed digital logic is replacing functions that have been traditionally performed by less flexible analog circuitry."

The ADC cores have an area of 4 mm² and the DAC cores have an area of 2.2 mm² . The cores include a wide tuning millimeter wave synthesizer enabling the core to tune from 42 to 68 GS/s per channel with a nominal jitter value of 45 femtoseconds root mean square. The full dual-channel 2x64 GS/s ADC core generates 128 billion analog-to-digital conversions per second, with a total power consumption of 2.1 Watts while the dual DAC consumes 1.7 Watts. The cores achieve 5.8 ENOB up to 10 GHz and SFDR greater than 43dB. In addition, the cores contain all necessary BIST and calibration eliminating the need for the user to develop sophisticated production test or mission mode calibration algorithms.