Dual, 16-Bit, 1.25-GSPS, Digital-to-Analog Converter IC Incorporates a JESD204 Serial Input to Simplify the FPGA Interface

The AD9128’s high-speed serial interface greatly simplifies and improves the data connection between the DAC and the FPGA in a typical system implementation.

High-performance FPGAs are increasingly being utilized as processors in many data-centric wireless and wired communications, radar, avionics, and medical imaging applications. FPGAs are gaining favor due to their inherent advantages of easier system development, reduced time-to-market, higher processing speed, and on-the-fly programmability. However for higher-resolution, 1-GSPS+ data converter applications, data transfers in and out of an FPGA have traditionally been a design bottleneck because of interface bit-rate limitations, interconnect layout complexity, and parallel interface board space requirements. JESD204 was specifically developed to remedy these constraints by defining a robust high-speed serial interface that is scalable and accommodates data rates in the multiple Gbps range. ADI is committed to embracing this standard in its ultra-high-speed data-converter technology, and FPGA manufacturers are actively integrating this protocol into their high-performance platforms.

The JESD204A-compliant AD9128 offers high sampling rate and high dynamic range, enabling multicarrier generation up to the Nyquist frequency, and includes features such as an on-chip 32-bit NCO, allowing flexible placement of the IF, complex digital modulation, and gain and offset compensation. A 4-wire serial port interface provides for programming and read-back of many of the device’s internal parameters and functions. The AD9128 supports GSM, WCDMA, TD-SCDMA, CDMA2000, WiMAX, and LTE wireless communications standards.

The AD9128 DAC is available on a standardized FMC evaluation board for direct connectivity with Xilinx FPGA development platforms.

AD9128 Dual 16-bit D/A Converter for Transmit Signal Chain IF Synthesis:
• 1.25 GSPS capability supports IF bandwidths up to 500 MHz
• Excellent dynamic range:
80 dBc @ fDAC = 200 MSPS, fOUT = 50 MHz
72 dBc @ fDAC = 800 MSPS, fOUT = 70 MHz
• Single-carrier W-CDMA ACLR = 82 dBc @ 122.88 MHz IF
• Novel 2×/4×/8× interpolator/complex modulator allows carrier placement anywhere within the DAC’s bandwidth
• Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω
• 4 lanes of high-speed JESD204A serial links (each capable of 3.125 Gbps)

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The AD9128 high-speed D/A converter’s analog outputs are optimized to interface seamlessly with analog quadrature modulators, such as ADI’s ADL537x F-MOD series, and the ADCLK914 clock/data buffer that drives the AD9128 D/A converter with clock input jitter performance of 110 fs. Other complementary parts include the ADRF6702 quadrature modulator and ADRF6602 Rx mixer.