16-bit DAC converter claims to be industry's fastest

Both devices deliver the bandwidth, performance, small footprint and low power consumption needed for multi-mode 2G/3G/4G cellular base stations. This allows for base stations to migrate to more advanced technologies, such as LTE-Advanced and carrier aggregation on multiple antennas. the DACs support up to 2GHz of information bandwidth for wideband power amplifier digital pre-distortion, millimeter wave backhaul infrastructure, signal jamming, radar and test equipment. An interoperability report is available, providing he guidance designers need to quickly implement a working link between the FPGA and high-speed DAC.

To enable quick evaluation of the DACs, EVMs are available immediately. The DAC38J84EVM, DAC37J84EVM, DAC38J82EVM and DAC37J82EVM include the LMK04828, the industry’s first JESD204B clock jitter cleaner, which provides the 2.5-GHz DAC clock and multiple SYSREF signals for full JEDEC JESD204B multi-chip synchronization. An IBIS model is also available to verify board signal integrity requirements.Available in 2Q 2014, reference designs will also be available for all four DACs. The designs will include the LMK04828 JESD204B clock jitter cleaner and two wideband complex modulator options for a complete bits-to-RF solution up to 4 GHz. Modulator options will include the TRF3705 and an upcoming version of the TRF3705 with integrated PLL/VCO.

Any of the DAC EVMs can be paired with the TSW14J56EVM pattern generator and data capture card. A suitable ADC EVM, such as the ADS42JB69EVM, can be used to create a complete transmit and receive evaluation system.

Samples of all four DACs are available today in a 10 x 10-mm BGA package. Production quantities are expected in the first half of 2014. Suggested retail pricing for 1,000-unit quantities is as follows: US$120 for the DAC38J84, US$79 for the DAC37J84, US$70 for the DAC38J82 and US$39.95 for the DAC37J82.