Renesas 32-bit RX CPU core features 4.0 Coremark/MHz

13th November 2013

Renesas

Nat Bowers

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Renesas have today revealed the development of a new, high-performance 32-bit RX CPU core for embedded devices in the consumer, industrial, and office equipment fields. The new RXv2 core features increased performance from 3.2 to 4.0 Coremark/MHz or 2.0 DMIPS/MHz, with a maximum frequency of 300MHz in 40nm. It will also feature enhanced DSP and FPU capabilities.

The new core architecture benefits applications requiring a combination of higher performance, and DSP and FPU capabilities on a single MCU. Target applications, therefore, include factory automation, motor control, signal analysis, audio filtering, image processing, and connectivity.

Backward compatible with the Renesas RXv1 CPU core (currently employed in the RX family of 32-bit CISC microcontrollers), the RXv2 core contains all the instruction sets available in the RXv1 core. This means that applications developed for the RXv1 will be binary compatible with the new core.

The RXv1 core combined the increased processing capacity made possible by the ability of CISC MCUs to execute complex instructions with RISC streamlining techniques developed for the CPUs of other Renesas MCUs. Specifically, CISC features such as variable-byte instructions are combined with RISC features such as general register machine, Harvard architecture, and five-stage pipeline. Thanks to a dual-issue pipeline structure and Advanced Fetch Unit, the RXv2 core leverages this architecture to deliver improved computing performance, power efficiency and high code efficiency.

Since they provide higher added value and accommodate increased system complexity, demand for improved processing performance in single-chip MCUs is growing. Better CPU processing performance is particularly required for motor control and mechanism control applications in the industrial and office equipment fields. This results in improved real-time performance and enhanced stability.

Increasing the operating frequency is a common method of boosting performance, however this also increases the operating current flow. Negative effects of this include requiring redesign of the power supply circuit or counter measures to deal with noise on the system board. This then increases overall system cost and development time. Retaining backward compatibility, Renesas has developed the new RXv2 core to meet these demands while delivering improved CPU performance and reduced power consumption.

Renesas plans to start sample shipments of RXv2-based MCUs, as well as the RX Software Package, in the first quarter of FY2014.