Prodigy processor outperforms potential competition

It is the latest revelation as the company continues its progress towards Prodigy’s product release next year.

Tachyum demonstrated how its computational operation and the speed of its product design, using an industry-standard Verilog simulation of the actual Prodigy post layout hardware, is the superior solution to current competitive offerings.

Prodigy execute instructions at very high speeds, and Tachyum now has an infrastructure implemented for automatically checking correct results from the Verilog RTL.

These automated tests check Verilog output for correctness compared to Tachyum’s C-model, which was used to measure performance, and is now the ‘Golden Model’ for the Verilog hardware simulation to ensure it produces identical, step-by-step results.

This verification milestone dramatically increases Tachyum’s productivity and its ability to test the Prodigy hardware design efficiently in order to find bugs and correct them prior to tape-out.

With this latest accomplishment, Tachyum now has automated the constrained random test generation capability, which further adds to its productivity.

Tachyum’s previous hardware design milestone was to build components and interconnect them, which was successfully completed in April.

The most recent hardware design milestone – and resulting tool – is about the Prodigy processor producing correct results and its performance on test programs.

Prodigy is now handling branch mispredictions, or compiler misprediction of memory dependency, whereupon it detects, recovers and produces correct results.

Thanks to Tachyum’s IP suppliers, the company is now able to do read/writes from Prodigy communications mesh to its DDR5 DIMMs hardware memory models.

The global clock is now connected from the PLL to Prodigy cores.

RAMBIST and other manufacturability features are now integrated into the Prodigy hardware design in large part due to Tachyum’s physical design partner.

“This latest hardware milestone is a testament to the diligent work of our engineering team and the vast human resources we have been able to assemble to complete a revolutionary solution never before seen,” said Dr. Radoslav Danilak, Tachyum founder and CEO. “We set out to produce the highest performance, lowest energy and most cost- efficient processor for the hyperscale, HPC and AI marketplace and these milestones are proving that we are achieving those goals. With a product that is faster than the fastest Intel Xeon or NVIDA A100 Chips, Prodigy is nearing all of its stated objectives and remains on track to make its debut as planned next year.”

Tachyum's Prodigy can run HPC applications, convolution AI, explainable AI, general AI, bio AI and spiking neural networks, as well as normal data centre workloads on a single homogeneous processor platform with its simple programming model.

Using CPU, GPU, TPU and other accelerators in lieu of Prodigy for these different types of workloads is inefficient.

A heterogeneous processing fabric, with unique hardware dedicated to each type of workload (e.g. data center, AI, HPC), results in underutilisation of hardware resources, and a more challenging programming environment.

Prodigy’s ability to seamlessly switch among these various workloads dramatically changes the competitive landscape and the economics of data centres.

Prodigy significantly improves computational performance, energy consumption, hardware (server) utilisation and space requirements compared to existing chips provisioned in hyperscale data centres today.

It will also allow Edge developers for IoT to exploit its low power and/ high performance, along with its simple programming model to deliver AI to the edge.