Renesas Introduces SRAM Family with Fast Operating Speed for Next-generation Communication Networks

For these products, Renesas greatly increased operating speeds while maintaining low-voltage operation by utilizing an advanced 45 nm fabrication process. The QDRII SRAM products achieve the industry's highest operating speed of 333 MHz, and the QDRII+ SRAM products also provide the industry's highest operating speed of 533 MHz. These devices can support high-speed processing for packet look-up and packet buffer applications in high-end routers and switchers that support 10G, 40G, and higher multi-layer communication systems.

Renesas will provide products that support three data I/O widths (9, 18, or 36 bits) and two burst lengths (2 or 4 words). In addition, Renesas will also provide products that feature a built-in ODT (on-die termination) function that significantly reduces the signal quality degradation that can occur during high-speed operation. Renesas' extensive lineup of QDRII, DDR II, QDRII+, and DDRII+ SRAM products allow users to select solutions that are optimal for their systems.

With the ever-growing popularity of the Internet, transmission speeds and the amount of traffic being sent to communication equipment continue to increase, with data rate speeds now exceeding 40-Gbits/second. Checking data destinations and managing data packet traffic in the high-end networking equipment is driving the demand for high density memory capable of high speed performance. Furthermore, the complexity of data continues to increase with video, voice, and data applications, requiring even larger memory capacities.

Renesas Technology currently provides a broad range of SRAM products for industrial applications and for cache memory in UNIX*3 servers and workstations, as well as 18-Mbit Network SRAM and 36-Mbit DDRII and QDRII SRAM for communication equipment. As network equipment continues to evolve to higher levels of performance and capability, Renesas Technology has leveraged its design expertise and manufacturing technologies to achieve higher speeds and high reliability for the 72-Mbit QDR II and QDR II+ SRAM products to meet the demands for higher speed, larger capacity, and greater bit widths required for communication applications.

These products are available in all combinations of burst lengths and bit widths, and the standard HSTL (High-Speed Transistor Logic) interface is used for ultra high-speed synchronous SRAM.

The package used is a 165-pin plastic FBGA with a 15 mm × 17 mm size that features excellent thermal dissipation characteristics and is suitable for high-density mounting. These products are RoHS Directive*4-compliant and lead-free versions are also available. The QDR pin configuration will support seamless migration to densities of up to 288 Mbits in the future. In addition, FBGA package products support the IEEE standard test access port and boundary scan architecture (IEEE std. 1149.1-1990) that allow interchange connection checking during module mounting to be conducted at the board level.

In future developments in this area, Renesas has a solid roadmap and commitment to developing even larger and higher performance QDR/DDR SRAM products to support evolving customer needs.