On-chip ECC improves reliability for Asynchronous SRAMs

15th August 2014

Nat Bowers

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Simplifying designs and reducing board space, Cypress Semiconductor has introduced a 16Mb Fast Asynchronous SRAM with ECC (Error-Correcting Code). Without the need for additional error correction chips, the on-chip ECC feature allows the SRAMs to provide high levels of data reliability.

Featuring a 10ns access time, the 16Mb Fast Asynchronous SRAM is suited for industrial, military, communication, data processing, medical, consumer and automotive applications. Cypress has claimed that the devices deliver best-in-class soft error rate performance by performing all error correction functions inline, without user intervention. Offered in industry standard x8, x16 and x32 configurations, the 16Mb Asynchronous SRAMs operate over an industrial (-40 to +85°C) or automotive (-40 to +125°C) temperature range and 1.8, 3 and 5V.

Sunil Thamaran, Senior Director, Asynchronous SRAM Business Unit, Cypress, comments: “Cypress is the world’s undisputed asynchronous SRAM leader with more than 30 years of design and development experience to go with the industry’s broadest portfolio. Our 16Mb Fast Asynchronous SRAMs with ECC provide single-chip, reliable memory solutions for high-speed applications. We look forward to expanding our ECC-enabled SRAM offerings.”

Cypress has also announced a Fast SRAM with PowerSnooze family. This SRAM family includes on-chip ECC and combines the 10ns access times of Fast SRAMs with low standby power. The PowerSnooze power-saving mode consumes just 12uA (typical) deep-sleep current.

Available in RoHS compliant 48-pin TSOP I, 48-ball VFBGA, 119-ball BGA and 54-pin TSOP II packages, the 16Mb Fast SRAM and 16Mb Fast SRAM with PowerSnooze are sampling now in the industrial temperature grade, with production expected in October 2014.