Memory enables scalability of embedded solutions for microcontrollers

FMC's ferroelectric FETs use the ferroelectric property of hafnium oxide (HfO2) to transform CMOS logic transistors into efficient non-volatile memory devices. FeFETs benefit directly from the massive investments and innovations that lead to the scaling of standard CMOS processes to seven nanometre nodes and beyond.

The FeFET Memory provides high current drive capability and high read speeds, while efficient switching of memory cells results in fast writing with extremely low power consumption. They are also robust against environmental factors such as magnetic fields, radiation, and extreme temperatures. Furthermore, FeFETs are based on high-k metal gate CMOS based technologies and can therefore benefit from their scaling advantages. 

FeFETs can be manufactured with existing manufacturing equipment and only a few low-complexity additional processing steps are required.

Dr Stefan Müller, CEO of FMC. Stated: "Our innovative non-volatile memory technology addresses the current and future needs of the industry, with 1,000 times higher speed and 1,000 times lower power consumption than the current standard, with significant reductions in manufacturing costs and efficient scalability. Basically, the new memory technology is also suitable for stand-alone ICs, but initially we are focusing on the high-growth embedded memory market."

FMC's embedded memory technology utilises the ferroelectric properties of crystalline hafnium oxide. Hafnium oxide is the gate insulator material of CMOS transistors from the 45nm to the seven nanometre node and beyond. FMC's proprietary technology makes it possible to transform amorphous into crystalline, ferroelectric HfO2. In this way, any standard CMOS transistor can be converted into a ferroelectric field effect transistor (FeFET) - and thus a non-volatile memory cell.

In a FeFET, the polarisation direction within the hafnium oxide is switched downwards with a positive gate write pulse applied to the transistor gate, which leads to the threshold voltage of the transistor being lowered. With a negative gate-write pulse, however, the polarisation is directed upward, the threshold voltage is increased. 

To read the memory cell, a voltage between the expected lower and upper threshold voltages is applied at the transistor gate. If the transistor is conducting, a zero was stored, if the transistor is not conducting, a one was stored. The material maintains its polarisation even when no voltage is applied and is therefore non-volatile.