Double bandwidth for IoT applications with HYPERRAM 3.0

The HYPERRAM product range offers compact alternatives to traditional pseudo-SRAM and is well-suited to low power, space-constrained IoT applications that require an off-chip external RAM. HYPERRAM 3.0 operates at a maximum frequency of 200MHz with a 1.8V operation voltage, which is the same as both HYPERRAM 2.0 and OCTAL xSPI RAM, but with an increased data-transfer rate of 800MBps – double the rate that was previously available. The new generation HYPERRAM operates via anexpanded IO HyperBus interface with 22 pins.

"As a leading provider of memory solutions, Infineon provides a family of solutions that deliver high performance in smaller form factors for next-generation IoT applications," said Ramesh Chettuvetty, Sr. Director of Marketing and Applications at Infineon Technologies. "HYPERRAM™ 3.0 is the third generation of the HYPERRAM™ family that supports throughput of up to 800MBps using a new 16-bit extended version of the HyperBus interface. The 256Mb HYPERRAM 3.0 devices are now sampling. Infineon Technologies is pleased to collaborate with Winbond to enable broader adoption of this new memory technology."

"Low pin count, low power consumption and easy control are three key features of HYPERRAM that help it significantly improve the performance of IoT end devices," says Winbond. "HYPERRAM significantly simplifies the PCB layout design, extends mobile devices' battery life, and works with a smaller processer via a lower pin count while increasing throughput compared to low-power DRAM, SDRAM, and CRAM/PSRAM," Winbond added.

New IoT devices execute more than simple machine to machine communication - they perform voice control or tinyML inferences and therefore need a higher memory performance. The HYPERRAM family is ideal for low-power IoT applications, such as wearables, instrument clusters in automotive applications, infotainment and telematics systems, industrial machine vision, HMI displays and communication modules. HYPERRAM 3.0 is the new generation able to operate under the same command/address signal and similar data bus format with enhanced bandwidth and the same standby power with little pin change. The first member of the HYPERRAM 3.0 family will be a 256Mb device in a KGD, WLCSP Package, which can be implemented at the component level, module level or PCB level based on the end product type.