RFSoC architecture for 5G wireless applications

4th October 2017

Xilinx

Alice Matthews

0 0

Datasheet

Provider of all programmable semiconductor products, Xilinx, has announced delivery of its Zynq UltraScale+ RFSoC family, an architecture integrating the RF signal chain into an SoC for 5G wireless, cable Remote-PHY, and radar. Based on 16nm UltraScale+ MPSoC architecture, the all programmable RFSoCs monolithically integrate RF data converters for up to 50-75% system power and footprint reduction, and soft-decision Forward Error Correction (SD-FEC) cores to meet 5G and DOCSIS 3.1 standards.

With silicon samples already shipping to multiple customers, the early access programme for the Zynq UltraScale+ RFSoC family is now available.

A System on Chip for the RF Signal Chain
Zynq RFSoCs combine RF data converters and SD-FEC cores with high performance 16nm UltraScale+ programmable logic and ARM multi-processing system to create a comprehensive analogue-to-digital signal chain. While RF to digital signal conditioning and processing is typically segmented into stand-alone subsystems, the Zynq UltraScale+ RFSoC brings analogue, digital, and embedded software design onto a single monolithic device for system robustness. Devices in the family feature:

Eight 4GSPS or sixteen 2GSPS 12-bit ADCs
Eight to sixteen 6.4GSPS 14-bit DACs
Integrated SD-FEC cores with LDPC and Turbo codecs for 5G and DOCSIS 3.1
ARM processing subsystem with Quad-Core Cortex-A53 and Dual-Core Cortex-R5s
16nm UltraScale+ programmable logic with integrated Nx100G cores
Up to 930,000 logic cells and over 4,200 DSP slices

Applications addressed by the Zynq RFSoC family include remote radio head for massive-MIMO, millimetre wave mobile backhaul, 5G baseband, fixed wireless access, Remote-PHY nodes for cable, radar, test and measurement, SATCOM, and Milcom/Airborne Radio and other high performance RF applications.

5G wireless
Zynq UltraScale+ RFSoC devices now make viable the most bandwidth intensive systems for next generation wireless infrastructure. 5G imperatives - ranging from 5X bandwidth, 100X user data rates, and 1,000X greater network capacity - would be unattainable without breakthroughs at the system level. The integration of discrete RF data converters and signal chain optimisation in Zynq UltraScale+ RFSoCs allow remote radio head for Massive-MIMO, wireless backhaul, and fixed wireless access to realise high channel density with 50-75% power and footprint reduction. Multiple integrated SD-FEC cores enable 10-20X system throughput vs. a soft core implementation for 5G baseband within stringent power and thermal constraints.

Cable Remote-PHY
Similarly, in next-gen cable broadband services, Zynq RFSoCs provide a combination of small form factor, power efficiency, and hardware flexibility to enable Remote-PHY systems. Distributed access architectures push DOCSIS 3.x PHY functionality from the centralised headend equipment to the Remote-PHY node located closer to consumers. By replacing inefficient analogue optical transmission with ubiquitous Ethernet transport, network capacity, scale and performance improves. With RF integration and an LDPC FEC-enabled signal chain, RFSoCs ensure flexible R-PHY deployment for greater spectral efficiency prescribed by DOCSIS3.1.

Radar
Zynq RFSoCs also deliver the needed performance and adaptability for key government programmes such as the Multi-function Phased Array Radar (MPAR) initiative to combine the functions of several national radar networks into a single system for aircraft and weather surveillance. Because these leading edge systems must operate in real time, the inherent integration of RF-Analogue makes the Zynq UltraScale+ RFSoC a suitable solution. Zynq RFSoC devices are currently designed into the Rockwell Collins' Common Module beamformer for the DARPA Arrays at Commercial Time Scales (ACT) programme, which aims to shorten design cycles and in-field updates, while pushing past traditional barriers for delivering radar arrays.