Programmable clock generators offer 500fs RMS phase jitter

16th October 2015

IDT

Barney Scott

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Integrated Device Technology has introduced the VersaClock 6 programmable clock generator family to deliver flexible, low-power timing for demanding high-performance applications. With RMS phase jitter of less than 500fs, the VersaClock 6 products deliver the best performance to date for IDT’s VersaClock family, offering an exceptional combination of jitter performance, flexibility, and low operating power.

With RMS phase jitter less than 500fs over the full 12kHz to 20MHz integration range, the devices meet the stringent jitter and phase noise requirements of applications and standards such as10G Ethernet, enterprise storage SAS and SATA, PCI Express Gen 1/2/3, XAUI, SRIO, stringent PHY reference clocks and the newest generations of high-end FPGAs - all while operating at about half the core power of competing devices. The devices’ core current consumption of 30 mA eases system thermal constraints and reduces operating power expenses. In addition, the VersaClock 6 devices are footprint compatible with their VersaClock 5 counterparts, enabling performance scalability with minimal design changes.

“These latest VersaClock products offer unmatched power savings for a programmable clock generator with this level of performance,” said Kris Rausch, general manager of IDT’s multi-market timing division. “The VersaClock 6 devices enable customers to meet their systems’ stringent jitter and low power requirements while at the same time reducing board space and bill of materials costs. With its winning combination of low phase jitter and power consumption, the VersaClock 6 device is ideal for such markets as high-end consumer, networking, computing, industrial and communications.”

The VersaClock 6 programmable clock generator offers universal output pairs that are independently configurable as LVDS, LVPECL, HCSL, or dual LVCMOS and can generate any output frequency from 1 MHz to 350 MHz on each output pair independently.

The series comprises the 5P49V6901, with four outputs of any frequency, the 5P49V6913, with two outputs of any frequency, and the 5P49V6914, with three outputs of any frequency.

The VersaClock 6 flexibility enables customers to get the exact functionality they need in a cost-effective manner, while exceptional RMS phase jitter performance addresses the requirements of high-performance applications and phase noise performance meets the latest FPGA specifications.

The 4mm² 24-VFQFPN package is footprint compatible with VersaClock 5 devices, enabling performance scalability with minimal design change. The VersaClock 6 family devices are available now with the 1,000 unit price of $5.20 for the 5P49V6901, $4 for the 5P49V6914 and $3.20 for the 5P49V6913.