High performance rate converters improve design reliability

Featuring four independent frequency families, strong jitter performance, up to 10 differential or 20 single ended configurable outputs and two fractional-N Analogue Phase Locked Loops (APLLs) with a fractional and integer divider, Microsemi’s miClockSynth devices can create a complete clock tree. The new devices can replace a number of multipliers, synthesisers and oscillators on the board, improving design reliability while reducing Bill Of Materials (BOM) costs and simplifying design. The products also feature an intuitive Graphical User Interface (GUI) and the ability to create factory pre-programmed devices with ease using Microsemi’s web tool, miClockDesigner.

“Our new family of high performance any-to-any rate converters and frequency synthesisers expands our broad portfolio of clock management solutions and supports our aggressive growth within the data centre and enterprise markets,” said Maamoun Seido, Vice President and Business Unit Manager of Microsemi's timing products. “Our data centre reference design utilises an all Microsemi timing solution providing customers with a turnkey, proven solution, built and tested. We will continue leveraging our deep expertise to develop unique value add solutions for our customers and increase our market share.”

According to the report from market research firm Databeans titled, Q4-2015 Timing Devices Market Tracker, the servers and storage area network market will grow to $63bn in 2016 with an average growth of 11% through 2020. Microsemi’s ZL30260-ZL30267 devices cater to this growing demand, targeting a wide variety of applications including enterprise switches and routers, PCIe, servers, storage systems, wireless base stations, wireless backhaul, access infrastructure and 1, 2.5, 10, 25, 40,100G Ethernet.

In addition to the devices’ low output jitter of 170 femtoseconds (fs) Root Mean Square (RMS), they also offer any rate frequency conversion—with any input frequency ranging from 10MHz to 1.2GHz to any output frequency less than 1Hz and up to 1GHz. They feature a highly precise numerically controlled oscillator with steep output frequency per APLL or fractional/integer-N divider with better than 0.01 parts per billion (ppb) resolution. In addition, the devices output format is configurable, with native LVDS, LVPECL, HCSL, 2xCMOS or HSTL per output reducing the number of termination components.  The device also features spread-spectrum modulation mode that meets PCIe market requirements.