Honey, I shrunk the FPGAs

26th September 2016

Daisy Stapley-Bunten

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Datasheet Whitepaper

RTG4 FPGAs integrate Microsemi’s 4^th gen flash-based FPGA fabric and high-performance interfaces such as serialisation/deserialisation (SERDES) on a single chip while maintaining the resistance to radiation-induced configuration upsets in the harshest radiation environments, such as space flight (LEO, MEO, GEO, HEO, deep space); high altitude aviation, medical electronics, and nuclear power plant control.

RTG4 FPGAs are manufactured on a low power 65nm process with substantial reliability heritage. RTG4 FPGAs will be qualified to MIL-STD-883 Class B, and Microsemi will seek QML Class Q and Class V qualification.

RTG4 FPGAs are immune to radiation (SEU) induced changes in configuration, due to the robustness of the flash cells used to connect and configure logic resources and routing tracks.

No background scrubbing or reconfiguration of the FPGA is needed in order to mitigate changes in configuration due to radiation effects. Data errors, due to radiation, are mitigated by hardwired SEU resistant flip-flops in the logic cells and in the mathblocks. Single Error Correct Double Error Detect (SECDED) protection is optional for the embedded SRAM (LSRAM and uSRAM) and the DDR memory controllers. This means that if a one-bit error is detected, it will be corrected. Errors of more than one bit are detected only and not corrected. SECDED error signals are brought to the FPGA fabric to allow the user to monitor the status of these protected internal memories.

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