Highly optimised 3D LUT IP for FPGAs

Implemented as IP for FPGAs or programmable SoCs, the 3D LUT makes very efficient use of the resources on these devices to support real-time processing of up to 4K UHD video at 120fps using Lookup Table (LUT) sizes of up to 65x65x65 and a colour depth of up to 16 bits for both input and output. The scalability of the design easily supports alternative configurations including extension to 8K.

Due to the flexibility of the FPGA, the 3D LUT IP can support a variety of different standards, throughput rates and resolutions to suit different application requirements and budgets. Furthermore, with the wide range of additional functions available from Omnitek such as Image Signal Processing, Warp, Blend and Stitch, the 3D LUT can be integrated into a complete system design on an FPGA with connectivity options including HDMI, SDI and V-by-One.

Roger Fawcett, CEO at Omnitek, commented: “We’ve seen a wide range of customer needs for 3D LUTs and are delighted now to be able to offer solutions not only to suit different technical requirements but also different engagement models. Depending on the customer’s level of expertise and resources, we can provide any level of support with the IP, right up to a full chip design or even a board-level design.”