CSSP platform provides flexible upgrade path for smartphones

Smartphone firmware can be very sophisticated, and migrating software to new host processors can be costly and time consuming. Unfortunately, the development of some of the underlying mobile application processors has not kept pace with market demand for new features such as VoIP calls and GPS. In particular, some processors have only low-speed UARTs, and just one SD (Secure Digital) host controller for peripheral connection.

Faster UART performance is a common request seen by QuickLogic. The standard UART capability integrated into some recent mobile application processors is a major limiting factor, as it tends to conform to the traditional UART role of low data-rate serial communication for applications such as a PC serial port. This is a particular problem for developers who need to support the latest high-speed EDR (enhanced data rate) mode of Bluetooth — a very important function for phones targeting business and high-end users.

Smartphones are also leading the cellular carriers’ drive towards supporting major new capabilities such as GPS positioning, location based services, and Wi-Fi capability for VoIP calls. A high speed UART again provides a suitable mechanism for interfacing to some GPS chipsets, while another SDIO port offers a simple means of connecting to embedded Wi-Fi chipsets.

One of QuickLogic's CSSPs, the PolarPro platform, is providing smartphone developers with a means of expanding the native host controller resources of the phone's mobile application processor. One of the smallest devices in the family, which consumes less than 10 microamps in standby mode and comes in TFBGA packages as compact as 5x5 mm, can easily integrate two high speed UARTs and an additional SDIO port, as well as the processor interface required.

This CSSP approach provides a low power, single-chip solution that contrasts well against alternative implementation strategies. There are commercial devices available for additional SDIO host controllers, or devices offering multiple high-speed UARTs, but using both would eat up valuable real estate on an already densely packed PCB. Migrating to another state-of-the-art processor is always an alternative, but this demands a major investment in software porting effort, as well as time. Conventional logic could also implement the functionality required, but this technology is generally viewed as too power hungry and costly for consumer applications such as this.

Expanding the functionality of smartphones is typical of the applications that the novel CSSP approach supports, says Howard Li, Senior Manager Connectivity Solutions at QuickLogic. Power efficient devices can be populated with a small feature set such as this UART-and-SDIO example, or a wide range of high-level capabilities such as USB OTG, dynamic LCD contrast control, flexible memory interfacing, autonomous data transfer engines that can operate without waking up the host CPU, etc. CSSPs really provide the 'missing link' in today's consumer semiconductor world, offering a mechanism that can expand the capabilities of ASSPs or CPUs both cost effectively and with very low power consumption.

The first platform in QuickLogic's latest PolarPro II family offers a capacity of 27 'Customisable Building Blocks' (CBBs), a measure of the level of functionality that can be integrated. A high-speed UART from QuickLogic's library requires 5 CBBs, and an SDIO port, 15. Together with the logic required to implement an application processor interface, this device provides a cost effective solution for the smartphone configuration discussed. Other, larger PolarPro platforms are available for OEMs and ODMs that require more functionality, as well as devices that combine hard-wired functions with a programmable fabric.