Displays
Cypress Introduces High Density FIFO Memories
Device Family Includes Densities up to 72 Mbits for Buffering High Bandwidth Video and Imaging Applications with Enhanced Signal Integrity
CyprThe HD FIFO is an advanced buffering alternative to standard synchronous DRAM memories used in combination with large FPGAs. Cypress’s HD FIFOs offer enhanced signal integrity compared to a DRAM based solution, and operate at 133MHz frequency which is well-suited for buffering video frames. The HD FIFO offers up to eight separate directly addressable queues to enable designers to stream multiple video channels simultaneously. Using an HD FIFO enables designers to use a smaller FPGA, resulting in overall system cost reduction. Cypress’s HD FIFO also reduces design complexity, thus speeding time-to-market for video and imaging systems in broadcast, military, medical and BTS segments.
The new HD FIFOs are available in 18-, 36- and 72-Mbit densities. They support multiple I/O standards, including 3.3V and 1.8V LVCMOS and HSTL1. The HD FIFO solution also provides user-selectable memory organization and can be configured as a x9, x12, x16, x18, x20, x24, x32 or x36 device, providing designers flexibility to choose optimal depth and width. All of the HD FIFO densities are offered in the 209-ball BGA package, which ensures scalability.
“We’ve developed a FIFO product with sufficient bandwidth and density to enable high bandwidth buffered links between highly specialized sub-systems in the video broadcasting, military and medical space,” said Dinesh Maheshwari, Chief Technology Advisor at Cypress. “Features such as multi queuing allow for multiple logical streams between the sub-systems. In addition, multiple I/O standards with configurable width support allow the highly specialized sub-systems to evolve at their natural pace. HD FIFOs will help system designers get their products to market faster and with improved product performance.”