XMOS chooses CoSy for Software Defined Silicon

The XCore 32-bit RISC processor provides up to eight threads and is integrated with support resources into a building block called the XCore tile. Offering up to 400MIPs per tile, XCore has the performance to implement multiple complex real-time hardware and software functions, from simple I/O interfaces through to complete software applications. The first product family of XCore-based devices is to be announced during Q2 2008.

XMOS VP Engineering Mark Lippett said, “Licensing CoSy from ACE meant we could rapidly accelerate the development of our tool set compilers and focus resources on our XC programming language, a key ingredient for taking advantage of the power of our multi-threaded hardware. ACE’s in-depth experience of developing parallelizing compilers for some very unique target architectures made them the perfect partner to work with on what is a completely new class of programmable semiconductor.”

“It is often the case that processor architecture and tools design are carried out in relative isolation. In the development of Software Designed Silicon, it’s clear that the two have been integrated from the very outset and we’re really excited to have helped XMOS deliver on their vision of the future,” said Marco Roodzant, Vice President of Marketing and Sales for ACE. “The compilers are of strategic importance in a product like this and CoSy has proven it has the flexibility and performance to match the exacting requirements of SDS.”