Design
GOEPEL announce availability of Xilinx Zynq-7000 All Programmable SoC component special model libraries
GOEPEL electronic announces the availability of special model libraries for Xilinx Zynq-7000 All Programmable SoC components to support all programming and test strategies based on the innovative Embedded System Access technologies.
The “The Xilinx Zynq platforms offer a completely new level of programmability for the highly flexible design of system-on-chop (SoC) based solutions. Many of our customers in various market segments already implement respective development projects on the lab stage, where we can ideally support them in prototype verification by our new technologies, says Heiko Ehrenberg, Manager with GOEPEL electronics LLC and Technology Officer for Embedded System Access (ESA). “That means, we are the first vendor of a complete ESA product portfolio for all Xilinx ICs incl. different processor cores. Additionally, we provide the seamless migration of all test and programming procedures from design to production, supporting the entire product life cycle.”
The models have been developed in tight cooperation with the GATE alliance partner Testonica Lab. They will be demonstrated at the International Test Conference (ITC) in Anaheim, CA/USA at the GOEPEL electronic LLC booth #304 for the first time.
About the Zynq-7000 Extensible Processing Platform:
The Zyng series All Programmable SoC combines a high performance Dual Core ARM CortexTM A9 architecture with the functionality of complex Field Programmable Gate Arrays (FPGA). They enable fully programmable system integration in a set of hardware, IP and software, and simultaneously reduce the number of discrete components as well as the power consumption. Their system properties address a wide range of applications in areas such as medical devices, consumer, communication and automotive. The Zynq components are integrated in a BGA (Ball Grid Array) package, preventing direct contact with external instruments. The goal of ESA technology utilization is to provide appropriate tools for test, hardware debug, Flash programming as well as design validation after chip mounting with minimal access efforts.
About Embedded System Access (ESA):
ESA technologies enable the electrical access to embedded systems without utilizing mechanical nails or probe contacts (non-invasive methods). They apply design-integrated test and debug interfaces such as JTAG. In addition to Boundary Scan, ESA technologies include procedures like Chip Embedded Instruments, Processor Emulation Test, In-system Programming or Core Assisted Programming. ESA technologies are currently the most modern strategies for validation, test and debug as well as programming complex chips, boards, and complete units. They can be utilized throughout the entire product life cycle, enabling improved test coverage at reduced costs.
About VarioTAP:
VarioTAP enables the reconfiguration of the integrated processor into a native design embedded test and programming controller via the JTAG Debug port. This test approach enables the functional at-speed test of all peripheral interfaces, incl. RAM, communication buses and analogue I/O. The execution of customer-specific software IP is also easily possible.
The use of VarioTAP does not require expert background knowledge, additional development tools, processor-specific pods, or any firmware, which makes handling easy and uncomplicated. Both JTAG and non-JTAG interfaces are supported.
About ChipVORX:
ChipVORX is an IP-based technology for implementation, access and control of Chip embedded Instruments via IEEE Std. 1149.x/JTAG. It also supports FPGA embedded Instruments in the form of softcores. The ChipVORX library currently contains more than 300 different test and measurement instruments for all leading FPGA platforms. Some of these instruments are frequency meters and high-speed Flash programmer as well as IP for at-speed access test of dynamic RAM devices. The usage of ChipVORX requires neither expert background knowledge nor specific FPGA tools or continuous IP adjustments.