Verification solution expanded to speed system design

In collaboration with ARM, Cadence enhanced its System Development Suite’s ARM-based system verification solution by including:

• New adaptable interconnect performance characterization test suite in the Cadence^® Interconnect Workbench, along with AMBA Designer integration, that delivers a significant speed-up of performance analysis and verification of CoreLink CCI-400 system IP and NIC-400 design tool based systems.  
• Expanded and pre-verified support of hardware-accurate OS embedded software verification using Palladium XP II platform with ARMv8 64-bit Cortex processor family Fast Models, which are now available through Cadence.
• Verification IP supporting AMBA 5 Coherent Hub Interface (CHI) protocol is the same protocol as implemented in the ARM CoreLink CCN-508 system IP and silicon proven CoreLink CCN-504 Cache Coherent Networks as used in enterprise level applications. The new Verification IP runs on all industry simulators, plus Accelerated Verification IP for Palladium XP II platforms.

“In the ultra-competitive mobile, network and server markets, our partners are driven by the need to quickly differentiate and deliver the right product inside very tight development windows” said James McNiven, deputy general manager, systems & software group, ARM.  “The expanding collaboration between ARM and Cadence, and the availability of better ARM-based system design and verification automation, enables our joint partners to focus on innovation and getting their value added products to market faster.”

“The Cadence Palladium solution for embedded software development enabled by ARM-based Fast Models helps us reduce the system software validation cycle and ensures a smoother post-silicon bring-up,” said Kevin Kranzusch, vice president, System Software, at NVIDIA. “The continued delivery of innovating technology from ARM and Cadence is crucial to our ongoing success.”