Breker introduces new SoC verification software

TrekSoC-Si automatically generates multi-threaded, multi-processor, self-verifying C test cases that run on the SoC’s embedded processors on in-circuit emulation platforms, field programmable gate array prototypes and production silicon.

Adnan Hamid, Breker’s chief executive officer, comments: “TrekSoC eliminated the need to hand-write tests for embedded processors in simulation and acceleration. TrekSoC-Si moves beyond simulation to generate test cases for hardware verification platforms, eliminating the need to hand-write hardware validation tests while stressing all aspects of the SoC before trying to boot the operating system and applications.”

The new product is a companion to TrekSoC and provides complementary functionality. TrekSoC-Si employs the same graph-based scenario model used to generate test cases and requires no additional resources to move beyond simulation into hardware platforms. With no changes to the scenario model, test cases can be generated and tuned for each platform. For example, longer test cases can be run in hardware than in software. Test cases concentrate on verification of concurrent, coherent and multi-threaded capabilities.

How it works

TrekSoC-Si automatically generates self-verifying C test cases that target system-level interactions. These test cases focus on verification of concurrent, coherent and multi-threaded capabilities, and are designed to run efficiently in any hardware platform. Test cases include realistic application scenarios, such as use cases that involve multiple IP blocks interacting together. This is more efficient and more effective than hand-written tests, which typically verify only that each IP block is instantiated properly into the SoC.

The test cases provide unique visualization capabilities via the TrekBox module running on the same host system used to download code into the hardware platform. TrekBox shows in real time the progress of each application scenario as it moves from thread to thread and from processor to processor. This display clearly documents the test case and provides essential debug information if the test case uncovers an SoC design bug. TrekBox also handles self-checking comparison against expected results and other bookkeeping verification tasks to reduce memory consumption within the SoC.

Input information is derived from a system-level scenario model that describes desired outcomes developed by the user. Scenario models are developed in C/C++ using a simple paradigm of graphs and graph constraints, created with only a few constructs and requiring no new language. They are hierarchical so that models for IP blocks can be composed together for a subsystem or the complete SoC.

TrekSoC, first introduced in 2007, has been used to verify a variety of automotive, graphics, consumer electronics, and networking designs that have been taped out successfully and are in production use now. As a result, Breker’s experience is uniquely suited to hardware platforms and silicon validation because of TrekSoC’s processor-centric SoC verification approach. TrekSoC-Si supports all hardware verification platforms in order to eliminate hand-written tests and find real bugs at every stage of the SoC development process.

Availability

TrekSoC-Si is shipping now. Pricing is available upon request.