Synplicity and Lattice Expand Partnership to Include DSP Synthesis

“After looking at other commercial alternatives, we believe that Synplify DSP support for Lattice FPGA devices offers superior efficiencies and better performance for our mutual customers,” said Stan Kopec, Lattice corporate vice president of marketing. “The optimized DSP algorithm implementation in the Synplify DSP technology, combined with the LatticeECP2M devices’ powerful DSP blocks and massive memory, and with the Flash-based flexiFLASH architecture of the LatticeXP2 family, delivers users exceptional design advantages for communication and multimedia algorithm design.”

The Lattice-Synplicity relationship leverages the distinct competencies of each company to present new and innovative solutions for DSP algorithm design. The Synplify DSP software, Synplicity’s ESL synthesis platform, offers high-level modeling and hardware abstraction, constraint-driven algorithm synthesis into RTL and powerful system-wide optimizations for performance, area and multi-channelization tradeoff exploration. The combination of Synplify DSP and Lattice FPGA architectures helps designers capture multi-rate DSP algorithms quickly and easily. Designers can perform architectural exploration across multiple Lattice devices and create algorithmic IP that is highly portable and reusable, so users can easily map their DSP algorithms into any computing platform.

Andy Haines, senior vice president of marketing for Synplicity, said, “Our strategic relationship with Lattice provides an advanced alternative to other DSP-based design tools. Equally important, we are giving users of The MathWorks Simulink environment, for multi-domain simulation and model-based design, a new target vendor for their FPGA designs: Lattice.”

According to Haines, the expanded relationship with Lattice is expected to provide real user benefits for the implementation of DSP algorithms into silicon. With M-Control fully integrated into the Synplify DSP library and The MathWorks Simulink environment, data type and sample rate inheritance and propagation are fully supported. M-Control features inline debugging for supporting breakpoints and stepping into the M code. These features greatly simplify the specification and verification of control functionality that is often integrated into DSP algorithms. Moreover, with a comprehensive IP library of industry-standard functional blocks, such as FFTs, Viterbi decoders, DDS and CORDIC math functions, mutual customers of Lattice and Synplicity now can create designs rapidly in application-specific domains.

Synplify DSP is also well suited for wireless algorithm design, so Lattice users can develop FPGA-based applications for digital RF/IF processing, FEC (forward error correction) and digital multimedia (audio and video) encryption, as well as high-performance computing. Vector support in Synplify DSP dramatically reduces the effort needed to create multi-channel wireless algorithms and multi-antenna algorithms such as MIMO, video, radar and security applications. These features enable customers to rapidly describe, verify and implement complex wireless algorithms (such as WiMAX, 802.11 a/b/g/n and DVB standards) into hardware devices.

For high-performance DSP applications, Lattice devices provide up to a 50 percent performance and 75 percent logic utilization improvement over other solutions when implementing common DSP functions. Through advanced 90nm silicon technology, an optimized architecture and proprietary circuit design, Lattice devices reduce total solution costs by up to 30-50 percent compared to other FPGA solutions. It is believed that these distinct advantages will promote the adoption of FPGAs within the $20 billion ASIC marketplace.

Working in conjunction with Synplicity’s Synplify, Synplify Pro and now Synplify DSP, Lattice offers a broad set of powerful tools for all design tasks including project management, IP integration, design planning and place and route, as well as in-system logic analysis for a comprehensive design solution for engineers.