Software Eases ASIC Prototyping

30th January 2007

ES Admin

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Synplicity, Inc. has announced its Certify ASIC RTL prototyping software delivers optimal support for the Xilinx Virtex-5 family of 65-nanometer FPGAs. The Certify software is the leading product for ASIC prototyping using multiple FPGAs. By combining multi-chip partitioning with best-in-class FPGA synthesis, the Certify tool allows designers to take full advantage of the speed, versatility and ultra-high capacity of Xilinx Virtex-5 devices for FPGA-based prototyping. Designers who use the Virtex-5 devices in combination with the Certify software should be able to fit more of their ASIC design onto fewer FPGA devices making prototyping quicker, easier and less expensive.

Using the latest version of the Certify product, designers can expect shorter prototype development times and improved prototype performance due in part to enhancements to two of the tool's most powerful and unique partitioning features: Quick Partitioning Technology (QPT) and the Certify
Pin Multiplexer (CPM). Quick Partitioning Techno-logy performs automatic pin assignments and, following initial manual placement of key logic blocks, automatically completes partitioning of the remaining blocks between FPGAs. The Certify Pin Multiplexer allows I/O pins of the FPGA
device to be shared without any changes to RTL code, alleviating one of the biggest problems typically encountered when partitioning a design across multiple FPGAs - running out of I/O pins. With the enhanced CPM feature, algorithms in the Certify software now utilize detailed knowledge of the
FPGA's clock network, dramatically increasing the clock speed of the prototype and delivering fast and accurate pin multiplexing implement-tation. In addition to QPT and CPM enhancements, the automated
DesignWare Conversion and automated Gated Clock Conversion features allow designers to use the ASIC RTL as is, without requiring manual changes.

Based on feedback from our customers and prototyping board partners, we believe there is dramatic growth in the use of FPGA-based prototyping for ASIC verification, said John Gallagher, director of outbound marketing at Synplicity. Our Certify soft-ware offers a comprehensive ASIC prototyping
solution which eases the prototyping process, saving valuable design time and engineering resources. When used with the ultra high-performance Xilinx Virtex-5 devices, we believe designers using the Certify software will implement ASIC prototypes at higher speeds in less time.

The latest version of the Certify software is available to customers starting in February 2007. Pricing for the Certify software starts at $45,000 (U.S.) for a one-year time-based license. Current Certify customers on maintenance will be upgraded at no additional cost.