SoC debug solution supports monitoring of multi-core systems

9th November 2015

CEVA Inc

Jordan Mulcare

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CEVA and UltraSoC announced that the companies have partnered to make UltraSoC’s universal SoC debug solution available for CEVA DSP cores. Today’s electronic devices require sophisticated, computationally intensive signal processing algorithms in order to execute audio, voice, vision, image and communications processing functions. CEVA’s broad portfolio of specialised signal processing cores and platforms are specifically tailored to enable these processor-intensive functions with minimal power consumption, making them suitable for any smart, connected device.

UltraSoC’s universal debug solution enables SoC developers to build an on-chip monitoring, control and communications architecture that ‘looks inside’ the chip while the device is operating. This greatly assists the identification and elimination of bugs, speeding up time to market. It can also be used after deployment for in-field performance monitoring and troubleshooting, leading to enhancements for current and next gen products.

The companies will publicly demonstrate UltraSoC’s technology for CEVA DSPs for the first time at the upcoming ARM TechCon on the 10-12^thof Novermber, 2015 in Santa Clara, CA, and later in the SemIsrael Expo on the 17^th November in Israel. The demo platform consists of a dual core ARM and CEVA based system in an FPGA, running side-by-side, with the UltraSoC IP, effectively allowing the two processors to be debugged and fine-tuned within a single environment.

Will Strauss, President, Forward Concepts, commented: “A large part of the value of UltraSoC’s platform is its vendor neutrality and ability to support SoCs featuring processor cores from multiple sources. The addition of CEVA DSP cores to the existing group, which includes other major IP vendors such as ARM, means that developers will have access to a very powerful system-wide debugging solution.”

Rupert Baines, CEO, UltraSoC, said: “We aim to deliver a truly universal SoC debug platform, and in that context, CEVA support is a ‘must-have’: with over six billion chips shipped featuring its cores, CEVA technology is at the hub of many of today’s audio, vision and communications devices. By working together, UltraSoC and CEVA now offer significant benefits to SoC developers who are designing CEVA DSPs into the next generation of emerging smart and connected devices.”

Moshe Shahar, Director of DSP Systems Architecture, CEVA, added: “UltraSoC’s ability to deliver non-intrusive, system-wide debugging with an extremely low silicon overhead makes it a valuable addition to the ecosystem supporting CEVA’s DSP families. As SoCs increasingly utilise multiple processors, the level of complexity rises accordingly and being able to monitor and analyse the behavior of an entire device represents a distinct advantage for developers.”