Sercos IP core for Xilinx 7 series FPGAs and Zynq SoC family available

The IP core is available for Sercos III master and slave controllers (SERCON100M/S) for automation devices. It includes all hardware functions, such as timing, synchronization and processing of cyclic and non-cyclic data on the basis of two integrated Ethernet MACs. Sercos III master and slave devices can be implemented as a single chip solution using either Xilinx Artix®-7 FPGAs, other FPGAs of the 7 series or Zynq SoC devices, which integrate an ARM® dual-core Cortex™-A9 processor.

“The on-going use of the flexible and continually developing FPGA technology brings significant cost, performance and flexibility benefits to the Sercos community,” said Peter Lutz, Managing Director of Sercos International e.V.