Safe and secure hypervisor and RISC-V RTOS support

Available first for the Renesas RH850/U2A, µ-visor is the basis for safe and secure consolidation of multiple MCU-based systems onto a single multicore design.

Green Hills is also featuring its µ-velOSity RTOS, now available for RISC-V. IoT edge designs increasingly use RISC-V to execute time- and mission-critical software applications, often combined with Arm or Intel CPUs on a single SoC.

The µ-velOSity RTOS and development tools provide a single integrated development environment for debug and optimisation of heterogeneous processor SoC designs.