Analog Bits Drives Innovation for 0.25 micron to 20 nm IC Designs Using Tanner EDA Schematic Capture and Layout Tools

“As process nodes shrink, electromigration is becoming a bigger and bigger problem, said Mahesh Tirupattur, executive vice president at Analog Bits. Metals becomes thinner and narrower, so that more sophisticated wiring is needed, making layout more complex. Layout-driven design is now vital to see how power distribution should be implemented. Fortunately, Tanner EDA's L-Edit and S-Edit tools have been able to keep up with our 20nm methodology, giving us the quality we are used to and helping us speed time to market. We always appreciate not needing to have a CAD engineer on hand to implement and manage every aspect of our EDA tools. Tanner EDA tools are individualized and modular. Everyone has dedicated licenses available and changes are easy to manage. The tool flow remains steady and dependable, with consistent user interfaces contributing to ease of use.”

S-Edit is Tanner EDA’s easy-to-use design environment for schematic capture, giving design engineers the power needed to handle the most complex full-custom IC design capture. L-Edit is Tanner EDA’s complete hierarchical physical layout editor. L-Edit combines fast rendering and built-in productivity tools to allow engineers to maximize efficiency when creating and laying out a design.

“The market tells us that, starting at 28 nm, analog layout becomes about 3-5x more complicated for IC design,” said John Zuk, vice president of marketing and business strategy at Tanner EDA. “This has not fazed Analog Bits, which recently increased its customer base and expanded its engineering facilities and support staff to keep up with demand for their broad portfolio of differentiated SERDES, PLL and Interface IP products. We’re glad to continue to provide them with tools to help their customers accelerate time to volume and to increase product differentiation.”