Design

IP Technology enhances Utilisation of chip-embedded Test and Debug Instruments

2nd November 2010
ES Admin
0
At the 2010 International Test Conference (ITC), GOEPEL electronic introduces ChipVORX, an entirely new in-system technology for the configuration and control of chip embedded test, debug, and programming functions. In its core this powerful solution is based on the utilization of a new communication interface in the software platform SYSTEM CASCON™, combined with special function libraries (ChipVORX® models) structured as intelligent IP. As a result, ChipVORX® enables the control of chip-embedded test and debug instruments in interaction with Boundary Scan operations and control of externally coupled instruments within one cohesive system platform.
“To GOEPEL electronic, chip-embedded instrumentation is a strategically important development direction with big potential. With ChipVORX® we are the first vendor to offer a completely open and universal IP solution as native part of a boundary scan system platform”, says Thomas Wenzel, GOEPEL electronic’s managing director of the Boundary Scan Division. “This new feature’s synergy with some of our other in-system technologies such as processor emulation test and communication with external instruments allows us to implement completely new strategies in design validation and production tests for boards with drastically reduced test access. Hence, this innovation is yet another cornerstone in our philosophy to provide multi-dimensional JTAG/Boundary Scan systems.”

ChipVORX® technology enables straight forward control of on-chip test, debug and programming functions of any complexity, based on the IEEE 1149.1 test bus protocol and fully synchronous with other boundary scan operations. The spectrum of possible applications spreads from simple register control, over utilization of primitive test functions to control of complex instruments.

For thorough design validation and for adequate tests in production the ability to control such chip-embedded features in-system – either while in test mode or during normal operation – is highly important for boards and systems with reduced test access.
ChipVORX® models contain all necessary structural and functional information to control the chip-embedded target circuitry. Models are protected by enable codes and can be generated by GOEPEL electronic, by authorized IP partners, and by GOEPEL customers. First implementations of ChipVORX® for FPGA accelerated Flash programming are already available; additional models will follow soon. The open ChipVORX architecture provides the necessary flexibility to quickly support the latest standards, such as IEEE P1687.
ChipVORX® technology is available in SYSTEM CASCON™ software starting with version 4.5.4. SYSTEM CASCON™ is a professional JTAG/Boundary Scan development environment, developed by GOEPEL electronic, currently featuring more than 45 fully integrated test, in-system programming, debug, and design validation tools.

ChipVORX® is supported both by low-cost SCANBOOSTER™ boundary scan controllers as well as by the SCANFLEX® hardware platform.

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