Platform enhances USB HID design
A platform, developed to enhance USB HID design, has been introduced by Digital Core Design (DCD). The design platform addresses the challenge of a true programmable embedded SoC integrating configurable analogue and digital peripheral functions.
The USB HID design platform supports UTMI transceiver macrocell interface as well as low cost full speed macrocells. Stacked with the DP8051 IP Core, the platform provides up to 256b of internal (on chip) data memory and up to 64Kb of internal (on chip) or external (off chip) programme memory.
Tomasz Krzyzak, Vice President and Member of the Board of Directors, DCD, said: “Our HID design platform offers the highest level of testability, conformance and verification. This specific SoC seems to be the leading combination of all crucial elements implemented in one IP Core.”
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