OneSpin Solutions Releases OneSpin 360 DV Product Family

Our formal verification software is built on a base technology that automates its use to perform tasks for a specific solution, says Dr. Raik Brinkmann, OneSpin Solutions' president and chief executive officer. While the EDA industry is moving toward an 'apps' model, we believe this automation is every bit as valuable as an 'app' but should come as a bundled solution.

Unveiling OneSpin 360 DV

The modular OneSpin 360 DV Product Family covers the full spectrum of formal ABV applications for register transfer level (RTL) design and includes 360 DV-Inspect, 360 DV-Verify and 360 DV-Certify. It accelerates a variety of verification tasks, shortens verification schedules and enables engineers to achieve design quality.

OneSpin 360 DV covers a broad range of formal ABV applications for new formal verification users to experienced users and experts and from fully automatic RTL checks to OneSpin's GapFreeVerification. With a step-by-step learning approach, new users can be productive in days.

360 DV-Inspect offers push-button formal analysis and is suitable for all levels of experience. 360 DV-Verify comprises several automated verification solutions and requires little formal verification knowledge, while making formal verification experts more productive by allowing them to capture their assertions at the transaction level. 360 DV-Certify enables formal experts to efficiently achieve 100% functional coverage for intellectual property (IP) blocks.

The OneSpin Solutions Product Portfolio

OneSpin Solutions provides comprehensive formal verification solutions across the entire system-on-chip (SoC) design project. Its software is in use on application specific integrated circuit (ASIC) and field programmable gate array (FPGA) designs to reduce verification effort and costs and deliver high functional quality.

In addition to OneSpin 360 DV, it also develops OneSpin 360 EC, an automated verification solution to show the functional equivalence of design representations. OneSpin 360 EC can be used standalone for full-chip implementation design equivalence in both ASIC and FPGA flows or in conjunction with the OneSpin 360 DV Product Family to preserve design quality through subsequent implementation and optimization phases. (See accompanying news releases also issued today titled, OneSpin Solutions Adds RTL-to-RTL Equivalence Checking to Product Family.)

The OneSpin Product Family will be demonstrated February 26-27 from 3:30 p.m. until 6:30 p.m. at DVCon 2013 at the Doubletree Hotel in San Jose, Calif.