Navigator Design Suite enhanced for the RFSoC Quartz Architecture

“The combination of the Navigator Design Suite and Quartz Architecture deliver some of the highest performance RFSoC FPGA designs available today,” said Robert Sgandurra, Director of Product Management. “These enhancements demonstrate our commitment to providing our customers with the best tools possible to optimise our hardware for their applications.”

Extended support for the Quartz family of RFSoC
Pentek’s family of Quartz products based on Xilinx’s RFSoC deliver an unprecedented amount of functionality in a single board. Both Navigator FDK and BSP have been extended to support this functionality.

Starting with the FDK, new cores support the RFSoC on-chip A/D and D/A converters with the following new features. Data acquisition and waveform generator cores have been updated that include support for VITA 49.2 VITA Radio Transport (VRT) packet formatting. A new optimised x16 decimation core extends the range of the built-in RFSoC decimation.

Pentek’s Smart A/D Calibration feature adds hardware, FPGA IP and software to make Xilinx’s calibration circuitry more robust across diverse operational scenarios. The programmable signal synthesiser core now includes a programmable frequency sweep generator, suitable for generating radar chirp pulse waveforms. These new cores for Quartz support operation of all eight RFSoC A/D and D/A converters simultaneously.

In addition to data converter support, the Navigator core library now includes 100 gigabit Ethernet UDP engines, each moving data in both directions at 12GBytes/sec through on-board optical interfaces. The Quartz board's optical interface supports up to two 100 gigabit Ethernet connections providing a total transfer rate of more than 24GBytes/sec.

The Navigator BSP adds new software resources for RFSoC ARM processors running Xilinx’s PetaLinux. In addition to drivers, software modules and example programs, the BSP now includes an API command processor application so that Quartz boards can be controlled by high level commands received through the board’s PCIe or 1 GigE interfaces.

Pentek provides a full library of API commands for all the most commonly used functions. As with all Pentek BSPs, full source code for the API command processor application is provided so developers can expand or modify the API set as needed for custom functions.

The Navigator BSP includes new example programmes for using the full set of evolving hardware features and IP core functions. Each example can be used as is, or its source code can be modified down to the lowest levels for custom operation.

Navigator Design Suite for streamlined IP development
Pentek’s Navigator Design Suite was designed from the ground up to work with Pentek’s Jade and Quartz architectures and Xilinx’s Vivado Design Suite providing an unparalleled plug-and-play solution to the complex task of IP and control software creation and compatibility. Graphical design entry for Xilinx and Pentek AXI4-compliant IP modules using the Xilinx IP Integrator greatly speeds development tasks.

With a software library structure designed to match the structure of the IP cores, Navigator simplifies the task of managing synchronisation between IP and software development. The Navigator BSP is available for Windows and Linux operating systems.