Tools to Optimize and Manage Multicore and Manycore Software

Multicore and manycore system development often gets sidetracked because development tool vendors and runtime systems for these programs are challenged to support the virtually unlimited number of processor configurations. The Multicore Association is initiating the SHIM to facilitate better tool support and quicker time to market.

Unlike the IEEE IP-XACT standard that defines and describes electronic components for hardware design, the primary goal of the SHIM working group is to define an architecture description standard useful for software design. For example, the processor cores, the inter-core communication channels (in support of message passing protocols such as the Multicore Association’s MCAPI), the memory system (including hierarchy, topology, coherency, memory size, latency), the network-on-chip (NoC) and routing protocol, and hardware virtualization features are among the architectural features that SHIM will either directly or indirectly describe. The SHIM standard will be flexible enough to allow vendor-specific, non-standard architectural information for customized tools. And, while the SHIM standard itself will be publicly available, the vendor-specific information can remain confidential between a processor vendor and its development tool partners.

The Multicore Association’s SHIM standard will be beneficial for many types of tools, including performance estimation, system configuration, and hardware modeling. Performance information is critical for most software development tools, including performance analysis tools, auto-parallelizing compilers, and other parallelizing tools. Moreover, operating systems, middleware, and other runtime libraries require basic architectural information for system configuration. In addition, the SHIM standard can be used with hardware modeling to support architecture exploration. An important goal for SHIM is to align with work underway in the Multicore Association’s Tools Infrastructure Working Group (TIWG).

The concept of SHIM was extracted from a Japanese government funded project (http://www.nedo.go.jp/content/100508843.pdf) to build a standardized ecosystem to support a manycore hardware/software platform. Initial recipients of this funding were eSOL, Nagoya University, Renesas Electronics, and TOPS Systems. Looking to expand the effort and develop a more comprehensive infrastructure, Masaki Gondo, Software CTO and GM of Technology at eSOL, volunteered to chair the SHIM Working Group within the Multicore Association. Currently, the member companies participating in the SHIM WG include Cavium, CriticalBlue, eSOL, Freescale Semiconductor, Mentor Graphics, Nagoya University, Nokia Siemens Networks, PolyCore Software, Renesas Electronics, Texas Instruments, TOPS Systems, Vector Fabrics, Wind River, and Xilinx.

“Through our work at eSOL, we have long realized the great benefit of having a standard model for describing hardware architectural features. At a minimum, SHIM will enable us to more easily support successive generations of SoCs from semiconductor vendors without requiring extensive development tool upgrades,” said Masaki Gondo. “The participants in the SHIM working group are highly motivated to develop the SHIM standard, as it will serve a critical need in the embedded industry.”

“The lack of high-quality and portable tools has kept system developers from fully utilizing the various multicore and manycore devices,” said Markus Levy, Multicore Association president. “Ultimately, SHIM will promote highly optimized tools that can provide efficient utilization of very complex SoCs and eliminate the need for users to comprehend 1000-page manuals to program all the device features.”