Software upgrade improves RFIC design efficiency

13th January 2015

Keysight Technologies (formerly Agilent)

Mick Elliott

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Datasheet

Keysight Technologies has released the latest version of its GoldenGate software, a simulation, analysis and verification solution for large-scale RFIC circuit design. Keysight EEsof EDA’s GoldenGate 2015.1 offers new and enhanced capabilities designed to improve productivity and efficiency for silicon RFIC designers.

It features a number of enhancements to its simulator, including Fast Envelope 3 support for envelope tracking modulation applications and support for multiple, non-harmonically-related frequency dividers.

Support for the frequency dividers enables designers to more accurately predict receiver crosstalk, which is common in LTE-A Carrier Aggregation simulation. GoldenGate 2015.01 also features a new multi-threaded sparse matrix solver that enables 10 to 50 percent faster transient simulations.

Additional improvements available in GoldenGate 2015.01 include faster crystal oscillator startup performance – five times faster out of the box, with a settled solution time of less than 20 periods versus greater than 10,000 for a full transient analysis and X-parameter* simulation and data file improvements.

The software also offers improved Envelope Transient Noise analysis efficiency, up to a 1.5 times speed-up in envelope tracking noise, improved multi-threading and refactoring for harmonic balance noise, up to a 2.5 times speedup and improved oscillator analysis performance, up to four times faster on the ring oscillator plus a divide by 32 circuit.

Additionally, GoldenGate 2015 enables designers to easily access the GoldenGate simulator from ADS with GoldenGate-in-ADS and the new ADS RFIC cockpit, available in ADS 2015.