Design

IP core is 75.08 times faster than predecessor

11th May 2015
Siobhan O'Gorman
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Equipped with built-in on-chip debugger, the DQ80251 IP core has been introduced by Digital Core Design. The device executes MCS-51 and MCS-251 instruction sets 75.08 times faster than the company’s original 8051 core.

For flexibility, the IP core features a range of integrated peripherals including USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC and Smart Card. The DoCD is a real-time hardware debugger, which provides non-intrusive debugging of running applications. It can halt, run, step into or skip an instruction, and read/write any contents of the MCU, including all registers, internal and external program memories and all SFRs.

“Our DQ80251 boasts a Dhrystone 2.1 performance rating of 0.70579DMIPS/MHz, which therefore enables a 75.08 times speed-up over the original 80C51 chip operating at the same frequency,” says Tomasz Krzyzak, Vice President, Digital Core Design.

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