Instruction Smart Trace aids transparent SoC debugging

IST is an inherent part of the DoCD Hardware Debugger, which provides a SoC debugging capability. Unlike other on-chip debuggers, the tool provides non-intrusive debugging of a running application and saves designer’s time, thanks to the hardware trace, called IST buffer. The DoCD-IST captures instructions in a smart and non-intrusive way, so it doesn’t capture addresses of all executed instructions, but only these related to the start of tracing, conditional jumps and interrupts. This method not only saves time, but also allows improvements to the size of the IST buffer and extensions of the trace history.

“For example, by using 256B of trace memory, we can store 128 programme branches and decode much more programme history, since the executed programme is composed of normal opcodes (mov, add, mul, anl, etc.) and branches,” explains Tomek Krzyżak, VCEO, Digital Core Design. “Based on this information stored in IST hardware memory, our DoCD.exe and Keil driver decode executed programme and display this information as an ASM code and C code in trace history.”

The DoCD Instruction Smart Trace buffer is configurable up to 8192 levels and is completely transparent for the debugged application. Its functionality enables real-time capture of executed instructions. Thanks to the buffer, the engineer can later read-back to track-down the history of executed code, by using the DoCD debug software.

Instruction Smart Trace has also configurable start/stop triggers, so the engineer can easily set the condition at which instruction tracing starts, as well as when it should stop. The trace buffer can also be changed or disabled dynamically. The IST uses the end of SXDM memory space, enabling it to share the trace memory with the debugged programmes. And when the debugging is finished, it assigns the whole memory back to the application.