Imperas and Imagination collaborate on providing virtual platform models

IMG RTXM-2200 is the first core from Imagination’s RISC-V Catapult range. It is a highly scalable real-time, deterministic, 32-bit embedded CPU, that is feature-rich and flexible in design for mainstream devices. It is targeted as a solution for markets such as cellular base stations, networking solutions for data transfer, packet management, and storage controllers. It can also be used as a helper core in complex SoCs.

Instruction Accurate (IA) processor models offer a programmer’s view of the hardware that allows software development to start many months before actual hardware implementations are available. The benefit in overall project schedules and time-to-market advantages are typically known as the ‘shift-left’ technique. Since software development starts much earlier than anticipated on the original project timeline chart, the related project activities and anticipated completion are seen to shift to the left on the time axis.

The Imperas simulation technology and tools help with all of the key software phases of an SoC project, from early software development right through to end users that can use the Imperas Fixed Platform Kits (FPK) as a replacement for the traditional development boards. FPK’s are pre-configured platform models with a binary deliverable for friction-free installation.

“The pace of innovation in markets such as the latest 5G communication networks and infrastructure offers many opportunities for new domain-specific SoC solutions,” said Chris Porthouse, Chief Product Officer at Imagination Technologies. “As a leading supplier of silicon IP, we fully appreciate the role of the ecosystem in supporting our lead customers in delivering new devices to market. We are pleased Imperas have now released the first Catapult RISC-V CPU Imperas reference model for the IMG RTXM-2200, which provides our mutual customers a proven path to accelerate projects to market.”

“Software development has a profound impact on schedules, not just as a factor in getting new devices to market but now also how the end systems are designed and developed around these new SoCs,” said Simon Davidmann, CEO at Imperas Software. “Imagination has the vision and insight to help smooth the transitional phases of early design, implementation, and go-to-market support at the end users, and we are excited that Imperas is part of the supporting ecosystem for the new Imagination Catapult RISC-V CPU, the IMG RTXM-2200.”

Availability

The Imperas reference model for the Imagination Catapult RISC-V CPU, RTXM-2200 is available on request to lead customers and partners.

Imperas reference models can be integrated with most industry-standard software IDEs and debuggers, and are available from Imperas and approved Imperas EDA distribution partners.

RISC-V Summit 2022

Imperas is proud to be a contributing Diamond sponsor for the fifth annual RISC-V Summit, December 12-15, 2022 in San Jose, California. Imperas will showcase solutions for RISC-V processor verification, custom instruction design flows, and software development, including a keynote on RISC-V Processor verification plus many other activities.

Join Imperas at the RISC-V Summit Kickoff Party on December 12^th, open to all RISC-V Members and Summit Attendees. Connect with influencers, developers, and users in the RISC-V ecosystem as we celebrate the evolution of RISC-V and our community. The fun starts at 5:30pm on the Market Terrace, San Jose Convention Center.