Design
Imagination reveals META family of embedded SoC processors
Imagination Technologies has announced the full roadmap for its Series2 generation of META processors, designed for the SoC-centric (System-on-Chip) age of silicon design. The META family of 32-bit SoC processor IP cores is a unique range of embedded processors that combine both general purpose and DSP capabilities within a hardware multi-threaded execution infrastructure to deliver exceptionally high processor utilisation and tolerance to SoC system latencies while also delivering new levels of real-time response that makes them ideal for SoC applications.
IndeFurthermore, by the addition of features to facilitate highly efficient integration with multi-standard communications engines such as Imagination’s ENSIGMA UCC programmable Wi-Fi and demodulation engines, META delivers a new generation of processors fully optimised for the internet and broadcast connected world.
SoCs being designed today place very different demands on embedded processors than those of a few years ago, as levels of systems integration continue to rise and applications make increasing use of high level APIs and operating systems. No longer is a single processor the highest priority user of system resources - it must increasingly share bus bandwidth, memory and other system resources with other sub-system processors for multimedia, communications and other specialised functions. This means the underlying architecture of embedded processors must be updated to reflect the fundamental changes in operating environment. It is with this evolving understanding of the practical realities of embedded processing in today’s SoCs that Imagination has created the Series2 architecture for its META family of SoC processors.
Says Tony King-Smith, VP marketing, Imagination: “For too long chip designers have stuck to traditional concepts of CPU-based SoC design, which is increasingly not appropriate for the levels of system integration we’re now seeing in SoCs. Embedded processors – whether running applications under Linux or highly optimised DSP algorithms - now need to be much more effective in ensuring every clock cycle counts to minimise power and maximise performance, Based on our years of experience of embedding META processors in many of our SoC IP cores and customer SoC designs, as well as our work with many of the world’s most advanced SoC vendors integrating our high performance multimedia and communications engines with every major CPU architecture, we’ve built on the core strengths of our unique META processor architecture to meet the needs of SoCs far better than traditional CPUs for today’s low power, high performance connected multimedia age.”