IAR Systems makes massive enhancements to the world’s leading development tools for ARM

“The user-friendly feature enhancements, the widened core support, and the powerful optimizations actually make me confident to say that this is the strongest new release of IAR Embedded Workbench for ARM ever.”



The enhancements include a new source browser and text editor, which enable user-friendly functionality such as auto-completion, code folding, block selection, block indentation, bracket matching, and zooming. Word/paragraph navigation have also been improved.



Compiler enhancements include improvements to the previously introduced stack usage analysis functionality that provides calculations of the maximum stack depth for each call graph root. Introduced are for example support for C++ source code, support for recursion, and new useful linker directives. The linker directive check that can be used to calculate the stack usage at link time to verify that the used stack space does not exceed the allocated memory. The inline assembler has also been improved and expanded with a large number of new operand constraints and modifiers.



The new version includes outstanding speed optimizations, resulting in even faster execution times for the generated code. Compared to the previous version, the code generated for ARM Cortex-M4 shows up to 40 percent improvement on standard industry benchmarks for execution speed.



IAR Systems provides the world’s broadest support for ARM MCUs, and now strengthens this even further with added support for the energy-efficient ARM Cortex-M0+ core, and the high-end cores ARM Cortex-R5, ARM Cortex-R7, ARM Cortex-A7, and ARM Cortex-A15.



For developers who make use of IAR Systems’ innovative power debugging technology to test and tune their applications for power optimization, the launch of the new high-performing in-circuit debugging probe I-jet allows for even more refined power measurements. This is aided further by improved plot functions in the Timeline window. Using I-jet also enables a new memory configuration framework that adds safety against illegal memory accesses.